PIC16C926 Microchip Technology Inc., PIC16C926 Datasheet - Page 17

• Manufacturer Part Number: PIC16C926
• Description: 64/68-pin Cmos Microcontrollers With Lcd Driver
• Manufacturer: Microchip Technology Inc.

2.3
The Special Function Registers (SFRs) are registers
used by the CPU and Peripheral Modules for control-
ling the desired operation of the device. These regis-
ters are implemented as static RAM.
TABLE 2-1:
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1: These pixels do not display, but can be used as general purpose RAM.
Address
Bank 0
2001 Microchip Technology Inc.
Special Function Registers
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
ADRESH
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0'.
Shaded locations are unimplemented, read as ‘0’.
Name
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY
A/D Result Register High
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTB Data Latch when written: PORTB pins when read
PORTD Data Latch when written: PORTD pins when read
PORTE pins when read
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 Register
Holding register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register (LSB)
Capture/Compare/PWM Register (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
ADCS1
WCOL
LCDIF
Bit 7
IRP
GIE
—
—
—
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
SSPOV
ADCS0
PEIE
ADIF
Bit 6
RP1
—
—
—
—
—
PORTA Data Latch when written: PORTA pins when read
PORTC Data Latch when written: PORTC pins when read
T1CKPS1
TMR0IE
SSPEN
CCP1X
CHS2
Bit 5
RP0
—
—
Write Buffer for the upper 5 bits of the Program Counter
T1CKPS0 T1OSCEN
CCP1Y
Preliminary
CHS1
INTE
Bit 4
CKP
TO
—
CCP1M3
SSPM3
SSPIF
CHS0
RBIE
Bit 3
PD
The special function registers can be classified into two
sets, core and peripheral. Those registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
GO/DONE
TMR2ON
T1SYNC
CCP1M2
TMR0IF
CCP1IF
SSPM2
Bit 2
Z
PIC16C925/926
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
SSPM1
Bit 1
INTF
DC
—
T2CKPS0
TMR1ON
CCP1M0
TMR1IF
SSPM0
ADON
RBIF
Bit 0
C
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--0x 0000
xxxx xxxx
--xx xxxx
0000 0000
0000 0000
---0 0000
0000 000x
00-- 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
0000 0000
Power-on
Value on
DS39544A-page 15
Reset
—
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Details on
64, 72
80, 81
page
26
41
25
19
26
29
31
33
34
36
25
21
23
47
47
47
51
52
60
58
58
53
75
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