ADT7475 Analog Devices, Inc., ADT7475 Datasheet - Page 62

• Manufacturer Part Number: ADT7475
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

ADT7475
Table 48. Register 0x76—Extended Resolution Register 1
Bit
[3:2]
[5:4]
1
Table 49. Register 0x77—Extended Resolution Register 2
Bit
[3:2]
[5:4]
[7:6]
1
Table 50. Register 0x78—Configuration Register 3 (Power-On Default = 0x00)
Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
1
Table 51. Register 0x79— THERM Timer Status Register (Power-On Default = 0x00)
Bit
[0]
[7:1]
Table 52. Register 0x7A— THERM Timer Limit Register (Power-On Default = 0x00)
Bit
[7:0]
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
This register becomes read-only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
Name
V
V
Name
ALERT
Enable
THERM
BOOST
FAST
DC1
DC2
DC3
DC4
Name
ASRT/
TMR0
TMR
Name
LIMT
Name
TDM1
LTMP
TDM2
CCP
CC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read-only
Read-only
R/W
R/W
1
Description
V
V
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature measurement.
Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature measurement.
Description
ALERT = 1, Pin 5 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-
of-limit error conditions.
THERM Enable = 1 enables THERM timer monitoring functionality on Pin 9. Also determined by Bit 0
and Bit 1 (PIN9FUNC) of Configuration Register 4. When THERM is asserted, if the fans are running
and the boost bit is set, the fans run at full speed. Alternatively, THERM can be programmed so that
a timer is triggered to time how long THERM has been asserted.
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the maximum
programmed duty cycle for fail-safe cooling.
FAST = 1, enables fast TACH measurements on all channels. This increases the TACH measurement
rate from once per second to once every 250 ms (4×).
DC1 = 1, enables TACH measurements to be continuously made on TACH1. Fans must be driven
by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven motors.
DC2 = 1, enables TACH measurements to be continuously made on TACH2. Fans must be driven
by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven motors.
DC3 = 1, enables TACH measurements to be continuously made on TACH3. Fans must be driven
by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven motors.
DC4 = 1, enables TACH measurements to be continuously made on TACH4. Fans must be driven
by dc. Setting this bit prevents pulse stretching because it is not required for dc-driven motors.
Description
This bit is set high on the assertion of the THERM input and is cleared on read. If the THERM
assertion time exceeds 45.52 ms, this bit is set and becomes the LSB of the 8-bit TMR reading.
This allows THERM assertion times from 45.52 ms to 5.82 sec to be reported back with a resolution
of 22.76 ms.
Times how long THERM input is asserted. These seven bits read zero until the THERM assertion time
exceeds 45.52 ms.
Description
Description
Sets the maximum THERM assertion length allowed before an interrupt is generated. This is an 8-bit
limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms to 5.82 sec to be
programmed. If the THERM assertion time exceeds this limit, Bit 5 (F4P) of Interrupt Status
Register 2 (0x42) is set. If the limit value is 0x00, an interrupt is generated immediately on the
assertion of the THERM input.
CCP
CC
LSBs. Holds the 2 LSBs of the 10-bit V
LSBs. Holds the 2 LSBs of the 10-bit V
1
1
Rev. B | Page 62 of 68
CC
CCP
measurement.
measurement.