ADT7475 Analog Devices, Inc., ADT7475 Datasheet - Page 23

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ADT7475

Manufacturer Part Number
ADT7475
Description
Dbcool Remote Thermal Monitor And Fan Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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The user can also set up the ADT7475 so that, when the
THERM pin is driven low externally, the fans run at 100%. The
fans run at 100% for the duration of the time that the THERM
in Configuration Register 3 (0x78) to 1. This works only if the
fan is already running, for example, in manual mode when the
current duty cycle is above 0x00 or in automatic mode when the
temperature is above T
the duty cycle in manual mode is set to 0x00, pulling the
low externally has no effect. See
THERM TIMER
The ADT7475 has an internal timer to measure THERM
assertion time. For example, the THERM input can be con-
nected to the PROCHOT output of a Pentium 4 CPU to
measure system performance. The THERM input can also be
connected to the output of a trip point temperature sensor.
The timer is started on the assertion of the ADT7475’s THERM
input and stopped when THERM is unasserted. The timer counts
THERM times cumulatively, that is, the timer resumes counting
on the next THERM assertion. The THERM timer continues to
accumulate THERM assertion times until the timer is read (it is
cleared on read) or until it reaches full scale. If the counter
reaches full scale, it stops at that reading until cleared.
pin is pulled low. This is done by setting the BOOST bit (Bit 2)
T
THERM
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS BELOW T
MIN
Figure 27. Asserting THERM Low as an Input in Automatic Fan Speed
MIN
MIN
.
. If the temperature is below T
Control Mode
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS ABOVE T
ARE ALREADY RUNNING.
Figure 27
for more information.
MIN
AND FANS
MIN
THERM
or if
Rev. B | Page 23 of 68
The 8-bit THERM timer status register (0x79) is designed so
that the Bit 0 is set to 1 on the first THERM assertion. Once the
cumulative THERM assertion time has exceeded 45.52 ms, Bit 1
of the THERM timer is set and Bit 0 becomes the LSB of the
timer with a resolution of 22.76 ms (see
When using the THERM timer, be aware of the following.
After a THERM timer read (Register 0x79), the following
happens:
1.
2.
If the THERM timer is read during a THERM assertion, the
following happens:
1.
2.
3.
4.
The contents of the timer are cleared on read.
The F4P bit (Bit 5) of Interrupt Status Register 2 needs to
be cleared (assuming that the THERM timer limit has been
exceeded).
The contents of the timer are cleared.
Bit 0 of the THERM timer is set to 1 (because a THERM
assertion is occurring).
The THERM timer increments from zero.
If the THERM timer limit (Register 0x7A) = 0x00, the F4P
bit is set.
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
Figure 28. Understanding the THERM Timer
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
THERM ASSERTED ≥ 113.8ms
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
Figure 28
≤ 22.76ms
≥ 45.52ms
).
ADT7475

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