LCMXO256 Lattice Semiconductor Corp., LCMXO256 Datasheet - Page 92

no-image

LCMXO256

Manufacturer Part Number
LCMXO256
Description
Machxo Family Data Sheet
Manufacturer
Lattice Semiconductor Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO256-4M100C
Manufacturer:
LAT
Quantity:
6 613
Part Number:
LCMXO256C-3M100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO256C-3M100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO256C-3MN0C
Manufacturer:
LATTICE
Quantity:
108
Part Number:
LCMXO256C-3MN100C
Manufacturer:
Lattice
Quantity:
5
Part Number:
LCMXO256C-3MN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO256C-3MN100C
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
LCMXO256C-3MN100C
0
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Maxim
Quantity:
3 120
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO256C-3T100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO256C-3TN100C
Manufacturer:
LATTICE
Quantity:
5 600
Part Number:
LCMXO256C-3TN100C
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
LCMXO256C-3TN100C
0
www.latticesemi.com
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
November 2007
For Further Information
A variety of technical notes for the MachXO family are available on the Lattice web site at www.latticesemi.com.
For further information on interface standards refer to the following web sites:
• MachXO sysIO Usage Guide (TN1091)
• MachXO sysCLOCK PLL Design and Usage Guide (TN1089)
• MachXO Memory Usage Guide (TN1092)
• Power Estimation and Management for MachXO Devices (TN1090)
• MachXO JTAG Programming and Configuration User’s Guide (TN1086)
• Minimizing System Interruption During Configuration Using TransFR Technology (TN1087)
• MachXO Density Migration (TN1097)
• IEEE 1149.1 Boundary Scan Testability in Lattice Devices
• JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
• PCI: www.pcisig.com
6-1
MachXO Family Data Sheet
Supplemental Information
DS1002 Further Information_01.2
Data Sheet DS1002

Related parts for LCMXO256