ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 18

• Manufacturer Part Number: ATA6613
• Description: Ata6613
• Manufacturer: ATMEL Corporation

3.3.24.1
18
ATA6612/ATA6613
Typical Timing Sequence with R
The trigger signal T
R
For example, with an external resistor of R
watchdog are as follows:
t
t
t
t
t
t
After ramping up the battery voltage, the 5V regulator is switched on. The reset output NRES
stays low for the time t
the trigger sequence from the microcontroller. The lead time, t
t
ger pulse NTRIG occurs during this time, the time t
occurs during the time t
t
from the microcontroller is anticipated within the time frame of t
gering from glitches, the trigger pulse must be longer than t
restart the watchdog sequence. If the triggering signal fails in this open window t
output will be drawn to ground. A triggering signal during the closed window t
switches NRES to low.
Figure 3-8.
osc
OSC
d
1
2
nres
d
d
NTRIG
WD_OSC
NRES
= 7895
= 1053
= 1105
= 155 ms. In this time, the first watchdog pulse from the microcontroller is required. If the trig-
= 155 ms. The times t
VCC
3.3V
= 0.405
= constant = 4 ms
5V
= 19.6 µs due to 51 k
.
Undervoltage Reset
19.6 µs = 20.6 ms
t
19.6 µs = 155 ms
19.6 µs = 21.6 ms
reset
R
Timing Sequence with R
= 4 ms
WD_OSC
WD_OSC
wd
reset
– 0.0004
d
1
is adjustable between 20 ms and 64 ms using the external resistor
, a watchdog reset with t
and t
= 51 k
(typically 4 ms), then it switches to high, and the watchdog waits for
2
have a fixed relationship between each other. A triggering signal
t
d
= 155 ms
(R
t
trig
WD_OSC
> 200 ns
WD_OSC
t
1
= 20.6 ms
WD_OSC
)
2
(R
= 51 k
WD_OSC
NRES
t
wd
= 51 k ±1%, the typical parameters of the
t
2
1
= 4 ms will reset the microcontroller after
= 21 ms
starts immediately. If no trigger signal
in k ; t
TRIG,min
osc
2
t
1
= 21.6 ms. To avoid false trig-
> 200 ns. This slope serves to
in µs)
d
, follows the reset and is
t
2
9111C–AUTO–02/08
Watchdog Reset
1
t
2
immediately
nres
, the NRES
= 4 ms