LM5060Q1 National Semiconductor Corporation, LM5060Q1 Datasheet - Page 16

• Manufacturer Part Number: LM5060Q1
• Description: High-side Protection Controller With Low Quiescent Current
• Manufacturer: National Semiconductor Corporation

www.national.com
Application Information
V
RESISTOR R
The LM5060 monitors the V
Channel MOSFET. The drain to source voltage threshold
(V
7;
The MOSFET drain to source current threshold is:
where R
Figure
and I
rent.
TURN-ON TIME
To slow down the output rise time a capacitor from the GATE
pin to GND may be added. The turn on time depends on the
threshold level of the N-Channel MOSFET, the gate capaci-
tance of the MOSFET as well as the optional capacitance
from the GATE pin to GND.
capacitor C1. Reducing the turn-on time allows the MOSFET
(Q1), to slowly charge a large load capacitance. Special care
must be taken to keep the MOSFET within its safe operating
area. If the MOSFET turns on too slow, the peak power losses
may damage the device.
DS
DSTH
FAULT DETECTION and SELECTING SENSE PIN
SENSE
), which is set with the resistor R
7, V
DS(ON)
FIGURE 7. Setting the V
OFFSET
(16 µA typical) is the threshold programming cur-
S
V
is the resistive drop of the pass element Q1 in
DSTH
is the offset voltage of the V
= (R
S
x I
Figure 8
SENSE
DS
voltage of the external N-
) - V
DS
shows the slow down
Threshold
OFFSET
S
, is shown in
DS
comparator
Figure
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16
FAULT DETECTION DELAY TIME
To allow the gate of the MOSFET adequate time to change,
and to allow the MOSFET to conduct currents beyond the
protection threshold for a brief period of time, a fault delay
timer function is provided. This feature is important when drive
loads which require a surge of current in excess of the normal
ON current upon start up, or at any point in time, such as
lamps and motors. A single low leakage capacitor (C
connected from the TIMER (pin 7), to ground sets the delay
time interval for both the V
for the subsequent V
When the LM5060 is enabled under normal operating condi-
tions the timer capacitor will begin charging at a 6 μA (typical)
rate while simultaneously charging the gate of the external
MOSFET at a 24 μA (typical) rate. The gate-to-source voltage
(V
(typical) threshold before the timer capacitor has charged to
the V
down.
While V
V
Where I
C
time would typically be:
When the LM5060 has successfully completed the start-up
sequence by reaching a V
set by the timer capacitor (C
discharged to 300mV (typical) and the charge current is in-
creased to 11 μA (typical) while the gate of the external
MOSFET is continued to be charge at a 24 μA (typical) rate.
The external MOSFET may not be fully enhanced at this point
in time and some additional time may be needed to allow the
gate-to-source voltage (V
drain-to-source voltage (V
fall below the V
timer capacitor has charged to the V
cal) to avoid a fault.
When V
TH
DS
TIMER
GS
), the V
start-up fault delay time is calculated from:
) of the external MOSFET is expected to reach the 5V
V
TMRH
DS
value is 68 nF (0.068μF) the V
GS
TMRL
GS
Fault Delay = ((2V x 0.068 μF) / 6 μA) = 23 ms
DS
threshold (2V typical) in order to avoid being shut-
is less than the typical 5V threshold (V
FIGURE 8. Turn-On Time Extension
is greater than the typical 5V threshold (V
transition fault delay time is calculated from:
is typically 6 μA and V
DSTH
threshold set by R
DS
Over-Current fault detection.
GS
GS
GS
DS
) to charge to a higher value. The
) of the external MOSFET must
of 5V within the fault delay time
status detection at start-up and
TIMER
), the capacitor is quickly
TMRH
TMRH
S
GS
and I
is typically 2V. If the
start-up fault delay
threshold (2V typi-
SENSE
GATE-TH
before the
30104230
TIMER
), the
GATE-
)