XA-G49 NXP Semiconductors, XA-G49 Datasheet - Page 35
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XA-G49
Manufacturer Part Number
XA-G49
Description
Xa 16-bit Microcontroller Family 64k Flash/2k Ram, Watchdog, 2 Uarts
Manufacturer
NXP Semiconductors
Datasheet
1.XA-G49.pdf
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5. This parameter is provided for peripherals that have the data clocked in on the falling edge of the WR strobe. This is not usually the case,
6. Please note that the XA-G49 requires that extended data bus hold time (WM0 = 1) to be used with external bus write cycles.
7. Applies only to an external clock source, not when a crystal or ceramic resonator is connected to the XTAL1 and XTAL2 pins.
Philips Semiconductors
2001 Jun 27
* INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).
* INSTR IN is either D0–D7 or D0–D15, depending on the bus width (8 or 16 bits).
XA 16-bit microcontroller family
64K Flash/2K RAM, watchdog, 2 UARTs
ADDRESS AND DATA
ADDRESS AND DATA
and in most applications this parameter is not used.
UNMULTIPLEXED
UNMULTIPLEXED
MULTIPLEXED
MULTIPLEXED
ADDRESS
ADDRESS
PSEN
PSEN
ALE
ALE
Figure 21. External Program Memory Read Cycle (Non-ALE Cycle)
t
LHLL
Figure 20. External Program Memory Read Cycle (ALE Cycle)
A4–A11 or A4–A19
A4–A11 or A4–A19
t
AVLL
t
AVIVA
t
t
LLAX
LLPL
A0 or A1–A3, A12–19
A0 or A1–A3, A12–19
t
PLIV
t
PLPH
t
PXIX
INSTR IN
INSTR IN
35
*
*
t
PXIZ
t
IXUA
t
AVIVB
A0 or A1–A3, A12–19
XA-G49
Preliminary data
SU01073
SU00707
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