S1D13705 Epson Electronics America, Inc., S1D13705 Datasheet - Page 37
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S1D13705
Manufacturer Part Number
S1D13705
Description
S1d13705 Embedded Memory Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13705.pdf
(480 pages)
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Epson Research and Development
Vancouver Design Center
7.1.4 Motorola MC68K #2 Interface Timing
Hardware Functional Specification
Issue Date: 01/05/22
Symbol
SIZ0, SIZ1
DSACK1#
T
D[31:16]
f
D[31:16]
t10
t11
CLK
A[16:0]
CLK
t1
t2
t3
t4
t5
t6
t7
t8
t9
(write)
(read)
R/W#
CLK
CS#
AS#
DS#
Bus Clock frequency
Bus Clock period
A[16:0], CS#, SIZ0, SIZ1 valid before AS# falling edge
A[16:0], CS#, SIZ0, SIZ1 hold from AS#, DS# rising edge
AS# low to DSACK1# driven high
CLK to DSACK1# low
CLK to AS#, DS# high
AS# high to DSACK1# high
AS# high to DSACK1# high impedance
DS# falling edge to D[31:16] valid (write cycle)
AS#, DS# rising edge to D[31:16] invalid (write cycle)
D[31:16] valid to DSACK1# low (read cycle)
AS#, DS# rising edge to D[31:16] high impedance
Note
T
Hi-Z
Hi-Z
Hi-Z
CLK
CLK may be turned off (held low) between accesses - see Section 13.5, “Turning Off
BCLK Between Accesses” on page 83
t1
Table 7-4: MC68K #2 Timing (MC68030)
t3
Figure 7-4: MC68K #2 Timing (MC68030)
Parameter
t8
t10
VALID
t4
t5
VALID
VALID
1/f
1T
Min
0
0
0
0
CLK
CLK
t2
t9
t6
t11
t7
T
T
Max
CLK
33
22
18
20
20
CLK
/2
Hi-Z
Hi-Z
Hi-Z
X27A-A-001-09
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
S1D13705
Page 31
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