S1D12200 Epson Electronics America, Inc., S1D12200 Datasheet - Page 167

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S1D12200

Manufacturer Part Number
S1D12200
Description
S1d12000 Series Lcd Driver Ic Technical Manual Technical Manual
Manufacturer
Epson Electronics America, Inc.
Datasheet
S1D12304/12305 Series
(4)
(5)
(6)
5–18
Power Control
This command is used to control the operation of
the built-in power circuit.
P
Note: To operate the boosting circuit the
VF
VC
System Set
This command set the use or non-use of display
lines and CG RAM.
Execute this command first after turning on the
power supply or after resetting.
CG
N2
0
0
1
Electronic Volume Register Set
This command controls the liquid crystal driving
voltage V
cuit of the built-in liquid crystal power supply,
0 0 H
1 0 H
2 0 H
3 0 H
4 0 H
5 0 H
6 0 H
7 0 H
A0 WR D7 D6 D5 D4 D3 D2 D1 D0
A0 WR D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
oscillating circuit must be in operation.
5
0
= 0
= 0
= 0
= 0
N1
0
0
output from the voltage regulating cir-
1
1
1
1
0
1
0
1
1
1
C G R A M ( 0 0 H )
C G R A M ( 0 2 H )
: Boosting circuit OFF
: Boosting circuit ON
: Voltage follower OFF
: Voltage follower ON
: Voltage regulating circuit OFF
: Voltage regulating circuit ON
: Use of CG RAM
: Non-use of CG RAM
: 2 lines
: 3 lines
: 4 lines
0
0
2
DDRAM line 1
DDRAM line 2
DDRAM line 3
DDRAM line 4
Symbol register
1
0 N2 N1 *
3
0 VC VF P
4
* : Don't Care
5
For signals
PS
6
RAM Map
EPSON
Unused
7
For signals
: Unused
: Output from SEGS2 to SEGS6.
(7) RAM Address Set
8
1
2
thereby adjusting the gradation of liquid crystal
display.
When data is set in the 4-bit register, the liquid
crystal driving voltage can take one of 16 voltage
states.
When the electronic volume function is not used,
set (A3, A2, A1, A0) = (0, 0, 0, 0).
This command sets addresses to write data into the
DD RAM, CG RAM and symbol register in the
address counter.
When the cursor is displayed, the cursor is dis-
played at the display position corresponding to the
DDRAM address set by this command.
The settable address length is ADDRESS = 00H to
7FH.
Before writing data into the RAM, set the data
write address by this command. Next, when data is
written in succession, the address is automatically
incremented.
MSB .
A0 WR D7 D6 D5 D4 D3 D2 D1 D0
A0 WR D7 D6 D5 D4 D3 D2 D1 D0
0
0
9
0
1
C G R A M ( 0 1 H )
C G R A M ( 0 3 H )
0
0
0
1
A
0
1
0
1
. LSB
. :
:
B
1
0
1
1
C
Small
Large
ADDRESS
1 MSB *
| V
D
:
:
5
|
Unused
Hex Code
70H to 7FH
E
"
"
"
"
F
3.65 A
* LSB
| I
0.0 A
Rev. 2.4
REF
:
:
|

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