STE400P STMicroelectronics, STE400P Datasheet - Page 11
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STE400P
Manufacturer Part Number
STE400P
Description
STE400P - 4 PORT 10-100 FAST ETHERNET TRANSCEIVER - PHY DATASHEET
Manufacturer
STMicroelectronics
Datasheet
1.STE400P.pdf
(34 pages)
7.3 Register Descriptions
Table 3. Register Descriptions
PR0, MII Control Register. The default values on power-up/reset are as listed below.
R/W = Read/Write able. RO = Read Only.
Bit #
6~0
15
14
13
12
10
11
9
8
7
COLEN
XLBEN
DPSEL
SPSEL
ISOEN
Name
ANEN
PDEN
RSAN
XRST
---
Reset control.
1: Device will be reset. This bit will be cleared by STE400P
itself after the reset is completed.
Loop-back mode select.
1: Loop-back mode is selected.
Network Speed select. This bit’s selection will be ignored if
Auto-Negotiation is enabled(bit 12 of PR0 = 1).
1:100Mbps is selected.
0:10Mbps is selected.
Auto-Negotiation ability control.
1: Auto-Negotiation function is enabled.
0: Auto-Negotiation is disabled.
Power-down mode control.
1: Power-down mode is selected. Setting this bit puts the
0 – Normal operation.
1 – Isolate PHY from MII.
Setting this control bit isolates the STE400P from the MII, with
the exception of the serial management inter-face. When this
bit is asserted, the STE400Pdoes not respond to TXD[3:0],
TX-EN, and TX-ER inputs, and it presents a high impedance
on its TX-CLK, RX-CLK, RX-DV, RX-ER, D[3:0], COL, and
CRS outputs. This bit is initialized to 0 unless the configuration
pins for the PHY address are set to 00000h during power-up
or reset.
Re-Start Auto-Negotiation process control.
1: Auto-Negotiation process will be re-started. This bit will be
Full/Half duplex mode select.
1: full duplex mode is selected. This bit will be ignored if Auto-
Collision test control.
1: collision test is enabled. 0: normal operation
This bit, when set, causes the COL signal to be asserted as a
result of the assertion of TX _EN within 512 BT. De-assertion
of TX_EN will cause the COL signal to be de-asserted within
4BT.
Reserved
Negotiation is enabled (bit 12 of PR0 = 1).
STE400P into power-down mode. During the power-down
mode, TXP/TXN and all LED outputs are 3-stated, and the
MII interface is isolated.
cleared by STE400P itself after the Auto-negotiation
restarted.
Descriptions
Default Val
0
0
0
1
0
0
0
0
0
0
STE400P
RW Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
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