MSAN-128 Zarlink Semiconductor, Inc., MSAN-128 Datasheet - Page 7

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MSAN-128

Manufacturer Part Number
MSAN-128
Description
Implementing an ISDN Architecture Using the ST-BUS
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
Application Note
Communication to the trunk interfaces is via ST-BUS
(transporting both information for processing, and
control/status
determines
component. Bit timing is provided by a clock (2048
kHz clock) input, which is easily derived from the
4096 kHz clock used for the rest of the ST-BUS ISDN
components.
Controlling
microprocessor access to the ST-BUS. The MT8920
STPA (ST-BUS Parallel Access) device provides fast
microprocessor access to one incoming ST-BUS
stream and two outgoing ST-BUS streams (directly
corresponding to CSTo1, CSTi0 and CSTi1 needed
by the digital trunk interfaces. See Figure 6). The
ST-BUS timing is controlled by a frame pulse and a
clock signal. Another method of accessing the ST-
BUS with a microprocessor is the MT8980 Digital
Crosspoint, or the MT8952 HDLC Controller, both of
which will be discussed in a following section.
4.4 Non-ISDN Data to ISDN Interworking
The R reference point in the ISDN User Access
Model (Figure 1) is the point where terminals with
non-ISDN interfaces (TE2’s) access the ISDN. Data
Handset
Hands-
free
TE2
the
the
information).
R
MT89
MT8994/5
digital
start
DSTo
DSTi
C
C4i
F0i
ST-
MH8
ST-BUS
of
trunks
MH89500
Figure 7 - Typical Subscriber’s Premises Configuration
TE1
TERMINAL ADAPTION
DSTo
DSTi
a
C
C4i
F0i
MT8
DSTi
DSTo
C4b
F0b
MT8930
ST-
A
frame
PA/D
ST-BUS
requires
frame
MT8
MT8930
DSTi
DSTo
C4b
F0b
for
PA/D
flexible
pulse
each
terminals at this point may comply with the following
pre-ISDN recommendations for interfacing to Data
Communication Equipment: X.20, X.20 bis, X.21,
X.21 bis, and some V-series recommendations.
Recommendations I.460, I.461, I.462 and I.463
specify how these non-ISDN data interfaces may be
synchronously rate adapted to comply with ISDN.
The European Computer Manufacturers Association
recommendation
specifies asynchronous rate adaption.
The MH89500 performs rate adaption according to
I.460, I.461, I.463 and ECMA 102. Rate adapted
information is transferred to and from an ST-BUS
environment, where the information is available to
any other ST-BUS ISDN component. The MH89500
requires a 4096 kHz clock and a frame pulse, using
ST-BUS channels 0, 2 or 3 (channels 2 and 3 are
compatible with the B-channels of the MT8972 and
MT8930).
I.460 specifies that multiple low speed channels (8
kbit/s, 16 kbit/s, and 32 kbit/s) may be multiplexed
into one 64 kbit/s B-channel. Any bit rate below 8
kbit/s only needs one bit in an eight bit ST-BUS
channel, 8 to 16 kbit/s bit rates need two bits, 16 to
32 kbit/s bit rates need four bits, and 32 to 64 kbit/s
S0
MT8
MT8930
DSTo
DSTi
C4b
F0b
102
ST-BUS
NT1
(ECMA
MT8
MT8972
DSTo
DSTi
F0
C4
MSAN-128
102)
additionally
U
A-141

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