STPCI2 STMicroelectronics, STPCI2 Datasheet - Page 43

no-image

STPCI2

Manufacturer Part Number
STPCI2
Description
STPC ATLAS DATASHEET - X86 CORE PC COMPATIBLE SYS
Manufacturer
STMicroelectronics
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STPCI26DYI
Manufacturer:
ST
0
Part Number:
STPCI2DDYC
Manufacturer:
ST
Quantity:
66
Part Number:
STPCI2DDYC
Manufacturer:
ST
0
Part Number:
STPCI2GDYI
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STPCI2GDYI
Manufacturer:
ST
0
Part Number:
STPCI2GDYIE
Manufacturer:
ST
0
Part Number:
STPCI2HDYC
Quantity:
21
Part Number:
STPCI2HEYC
Manufacturer:
ST
Quantity:
277
Part Number:
STPCI2HEYC
Manufacturer:
CY
Quantity:
19 513
Part Number:
STPCI2HEYC
Manufacturer:
ST
Quantity:
20 000
Part Number:
STPCI2HEYCE
Manufacturer:
ST
Quantity:
201
Part Number:
STPCI2HEYCE
Manufacturer:
ST
Quantity:
20 000
4. ELECTRICAL SPECIFICATIONS
4.1. INTRODUCTION
The electrical specifications in this chapter are
valid for the STPC Atlas.
4.2. ELECTRICAL CONNECTIONS
4.2.1.
DECOUPLING
Due to the high frequency of operation of the
STPC Atlas, it is necessary to install and test this
device using standard high frequency techniques.
The high clock frequencies used in the STPC
Atlas and its output buffer circuits can cause
transient power surges when several output
buffers switch output levels simultaneously. These
effects can be minimized by filtering the DC power
leads with low-inductance decoupling capacitors,
using low impedance wiring, and by utilizing all of
the VSS and VDD pins.
4.2.2. UNUSED INPUT PINS
No unused input pin should be left unconnected
unless they have an integrated pull-up or pull-
down. Connect active-low inputs to VDD through a
20 k
inputs to VSS. For bi-directionnal active-high
inputs, connect to VSS through a 20 k
pull-up resistor to prevent spurious operation.
Note 1:
STPC device that is soldered to a board, as detailed in
the Design Guidelines Section, for Commercial and In-
dustrial temperature ranges.
Symbol
V
T
V
V
V
T
P
CORE
V
OPER
I
, V
ESD
STG
DDx
TOT
5T
(±10%) pull-up resistor and active-high
O
The figures specified apply to the Tcase of a
POWER/GROUND
DC Supply Voltage
DC Supply Voltage for Core
Digital Input and Output Voltage
5Volt Tolerance
Storage Temperature
Operating Temperature (Note 1)
Maximum Power Dissipation (package)
ESD Capacity (Human body mode)
Parameter
Table 4-1. Absolute Maximum Ratings
CONNECTIONS/
Issue 1.0 - July 24, 2002
(±10%)
4.2.3. RESERVED DESIGNATED PINS
Pins designated as reserved should be left dis-
connected. Connecting a reserved pin to a pull-up
resistor, pull-down resistor, or an active signal
could cause unexpected results and possible
circuit malfunctions.
4.3. ABSOLUTE MAXIMUM RATINGS
The following table lists the absolute maximum
ratings for the STPC Atlas device. Stresses
beyond those listed under
cause permanent damage to the device. These
are stress ratings only and do not imply that
operation under any conditions other than those
specified in section "Operating Conditions".
Exposure to conditions beyond those outlined in
Table 4-1
result in premature failure even when there is no
immediately apparent sign of failure. Prolonged
exposure to conditions at or near the absolute
maximum ratings
reduced useful life and reliability.
4.3.1. 5V TOLERANCE
The STPC is capable of running with I/O systems
that operate at 5 V such as PCI and ISA devices.
Certain pins of the STPC tolerate inputs up to
5.5 V. Above this limit the component is likely to
sustain permanent damage.
All 5 volt tolerant pins are outlined in
Buffer Type
Minimum
-0.3
-0.3
-0.3
-0.3
-40
-40
0
-
-
may (1) reduce device reliability and (2)
ELECTRICAL SPECIFICATIONS
Descriptions.
(Table
Maximum
VDD + 0.3
4-1) may also result in
2000
+150
+115
Table 4-1
+85
4.0
2.7
5.5
4.8
limits may
Table 2-3
Units
43/111
°C
°C
°C
W
V
V
V
V
V

Related parts for STPCI2