74ALVT162827DL,512 NXP Semiconductors, 74ALVT162827DL,512 Datasheet - Page 3

IC BUFF DVR TRI-ST 20BIT 56SSOP

74ALVT162827DL,512

Manufacturer Part Number
74ALVT162827DL,512
Description
IC BUFF DVR TRI-ST 20BIT 56SSOP
Manufacturer
NXP Semiconductors
Series
74ALVTr
Datasheet

Specifications of 74ALVT162827DL,512

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
10
Current - Output High, Low
8mA, 12mA
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Logic Family
ALVT
Number Of Channels Per Chip
20
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
20 / 20
Output Type
3-State
Propagation Delay Time
2.7 ns at 2.5 V, 2.2 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVT162827DL
74ALVT162827DL
935210060512
Philips Semiconductors
PIN CONFIGURATION
LOGIC SYMBOL
1998 Feb 13
2.5V/3.3V 20-bit buffer/line driver, non-inverting,
with 30 termination resistors (3-State)
56
28
29
1
1OE0
1OE1
2OE0
2OE1
1A0 1A1 1A2 1A3 1A4 1A5 1A6
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6
2A0 2A1 2A2 2A3 2A4 2A5 2A6
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6
55
42
15
2
1OE0
2OE0
54
41
16
GND
GND
GND
GND
3
V
V
1Y0
1Y1
1Y2
1Y3
1Y4
1Y5
1Y6
1Y7
1Y8
1Y9
2Y0
2Y1
2Y2
2Y3
2Y4
2Y5
2Y6
2Y7
2Y8
2Y9
CC
CC
52
40
17
5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
51
38
19
6
49
37
20
8
SH00010
48
36
21
9
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
47
10
34
23
1OE1
1A0
1A1
GND
1A2
1A3
V
1A4
1A5
1A6
GND
1A7
1A8
1A9
2A0
2A1
2A2
GND
2A3
2A4
2A5
V
2A6
2A7
GND
2A8
2A9
2OE1
CC
CC
1A7
1Y7
2A7
2Y7
45
12
33
24
1A8
1Y8
2A8
2Y8
44
13
31
26
1A9
1Y9
2A9
2Y9
43
14
30
27
SH00011
3
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
X = Don’t care
Z = High impedance “off” state
H = High voltage level
L = Low voltage level
SCHEMATIC OF EACH OUTPUT
nOEx
H
L
L
INPUTS
nAx
H
X
L
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
1
V
OUTPUTS
CC
nYx
H
Z
L
&
&
V
CC
1
1
EN1
EN2
27
27
74ALVT162827
1
2
OPERATING MODE
OPERATING MODE
High impedance
SW00206
Transparent
Transparent
OUTPUT
SH00012
Product specification
10
12
13
14
15
16
17
19
20
21
23
24
26
27
2
3
5
6
8
9

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