N74F543D,602 NXP Semiconductors, N74F543D,602 Datasheet
N74F543D,602
Specifications of N74F543D,602
N74F543D
N74F543D
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N74F543D,602 Summary of contents
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Octal latched transceiver with dual enable; 3-state Rev. 04 — 26 January 2010 1. General description The 74F543 octal latched transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch enable ...
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... NXP Semiconductors 4. Functional diagram EAB 23 EBA 14 LEAB 1 LEBA Fig 1. Logic symbol OEBA EBA LEBA Fig 3. Logic diagram 74F543_4 Product data sheet Octal latched transceiver with dual enable; 3-state OEAB 13 OEBA 2 001aae900 Fig DETAIL DETAIL Rev. 04 — 26 January 2010 2 1EN3 (BA 1C5 13 2EN4 (AB) ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description LEBA 1 B-to-A latch enable input (active LOW) OEBA 2 B-to-A output enable input (active LOW data input or output 10 EAB 11 A-to-B enable input (active LOW) ...
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... NXP Semiconductors 6. Functional description 6.1 Function table [1] Table 3. Function selection Input OEXX EXX [ HIGH voltage level HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX ( BA LOW voltage level LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition of LEXX or EXX ( BA); ...
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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V input voltage I V output voltage O I input clamping current IK I output current O T ambient temperature amb T storage temperature stg [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics Symbol Parameter V input clamping voltage IK V HIGH-level output OH voltage V LOW-level output OL voltage I input leakage current I I HIGH-level input current LOW-level input current IL I OFF-state output current output current O I supply current CC [1] All typical values are measured at V [2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Figure Symbol Parameter Conditions t LOW to HIGH An to Bn; see PLH propagation delay Bn to An; see LEBA to An; see LEAB to Bn; see t HIGH to LOW An to Bn; see PHL propagation delay Bn to An; see LEBA to An ...
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... NXP Semiconductors 11. Waveforms and V are typical voltage output levels that occur with the output load Fig 5. Propagation delay input (An, Bn) to output (Bn, An) LEBA, LEAB and V are typical voltage output levels that occur with the output load Fig 6. Propagation delay latch enable (LEAB, LEBA) to output (An, Bn) ...
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... NXP Semiconductors OEAB, OEBA 1 typical voltage output level that occurs with the output load. OL Fig 8. Propagation delay 3-state output enable to LOW-level and output disable from LOW-level An, Bn LEAB, LEBA, EAB, EBA The shaded areas indicate when the input is permitted to change for predictable output performance. ...
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... NXP Semiconductors negative V M pulse positive V M pulse Input pulse definition Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 10. Load circuitry for switching times Table 8 ...
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... NXP Semiconductors 12. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT340-1 Fig 12. Package outline SOT340-1 (SSOP24) ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • DIP 24 (SOT222-1) package removed from 12 “Package outline” ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline ...