74AUP2G126GT,115 NXP Semiconductors, 74AUP2G126GT,115 Datasheet - Page 12

IC BUFF DVR 3-ST DL L PWR 8XSON

74AUP2G126GT,115

Manufacturer Part Number
74AUP2G126GT,115
Description
IC BUFF DVR 3-ST DL L PWR 8XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G126GT,115

Package / Case
8-XSON
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Input Bias Current (max)
0.5 uA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
18.7 ns @ 1.1 V to 1.3 V or 10.8 ns @ 1.4 V to 1.6 V or 8.4 ns @ 1.65 V to 1.95 V or 6.3 ns @ 2.3 V to 2.7 V or 5.8 ns @ 3 V to 3.6 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G126GT-G
74AUP2G126GT-G
935280731115
NXP Semiconductors
Table 10.
74AUP2G126
Product data sheet
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 8.
CC
Measurement points are given in
Logic levels: V
Enable and disable times
Measurement points
OL
and V
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
nOE input
Input
V
0.5 × V
0.5 × V
0.5 × V
OH
output
output
M
are typical output voltage levels that occur with the output load.
CC
CC
CC
GND
GND
V
V
Table
V
CC
OH
OL
V
All information provided in this document is subject to legal disclaimers.
I
10.
V
enabled
Rev. 06 — 21 June 2010
outputs
M
t
PLZ
t
Output
V
0.5 × V
0.5 × V
0.5 × V
PHZ
M
V
CC
CC
CC
X
V
Y
disabled
outputs
Low-power dual buffer/line driver; 3-state
V
V
V
V
t
X
OL
OL
OL
PZL
t
PZH
+ 0.1 V
+ 0.15 V
+ 0.3 V
V
M
V
M
outputs
enabled
mna949
74AUP2G126
V
V
V
V
Y
OH
OH
OH
© NXP B.V. 2010. All rights reserved.
− 0.1 V
− 0.15 V
− 0.3 V
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