74AUP2G241DC,125 NXP Semiconductors, 74AUP2G241DC,125 Datasheet - Page 16

IC BUFF DVR 3-ST DL L PWR 8VSSOP

74AUP2G241DC,125

Manufacturer Part Number
74AUP2G241DC,125
Description
IC BUFF DVR 3-ST DL L PWR 8VSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP2G241DC,125

Package / Case
US8, 8-VSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Input Bias Current (max)
0.5 uA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
19 ns @ 1.1 V to 1.3 V or 10.8 ns @ 1.4 V to 1.6 V or 8.4 ns @ 1.65 V to 1.95 V or 6.3 ns @ 2.3 V to 2.7 V or 5.8 ns @ 3 V to 3.6 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP2G241DC-G
74AUP2G241DC-G
935280738125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP2G241DC,125
Manufacturer:
NXP
Quantity:
3 000
NXP Semiconductors
13. Package outline
Fig 11. Package outline SOT765-1 (VSSOP8)
74AUP2G241
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
Rev. 04 — 13 September 2010
REFERENCES
D
2.1
1.9
M
(1)
E
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
Low-power dual buffer/line driver; 3-state
H E
E
0.40
0.15
L p
0.21
0.19
Q
5 mm
L
L p
PROJECTION
EUROPEAN
Q
0.2
v
74AUP2G241
A
(A 3 )
0.13
w
X
θ
v
M
0.1
y
© NXP B.V. 2010. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
θ
16 of 26

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