74ALVC125PW,118 NXP Semiconductors, 74ALVC125PW,118 Datasheet - Page 3

IC BUFF DVR TRI-ST QD 14TSSOP

74ALVC125PW,118

Manufacturer Part Number
74ALVC125PW,118
Description
IC BUFF DVR TRI-ST QD 14TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVCr
Datasheet

Specifications of 74ALVC125PW,118

Package / Case
14-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
ALVC
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
10 uA
Low Level Output Current
24 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Output Current
50 mA
Output Type
3-State
Output Voltage
4.6 V
Propagation Delay Time
2 ns (Typ) @ 2.7 V or 1.8 ns (Typ) @ 3 V to 3.6 V
Number Of Lines (input / Output)
4 / 4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVC125PW-T
74ALVC125PW-T
935269719118

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ALVC125PW,118
Manufacturer:
NXP Semiconductors
Quantity:
2 000
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
74ALVC125_2
Product data sheet
Symbol
nA
nY
nOE
V
GND
Input
nOE
L
L
H
Symbol
V
I
V
I
V
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
I
O
tot
H = HIGH voltage level
L = LOW voltage level
X= don’t care
Z = high-impedance OFF-state
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
When V
For SO14 packages: above 70 C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
CC
Pin description
Function table
Limiting values
= 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
5.2 Pin description
Pin
2, 5, 9, 12
3, 6, 8, 11
1, 4, 10, 13
14
7
[1]
nA
L
H
X
Conditions
V
V
output HIGH or LOW state
output 3-state
Power-down mode, V
V
T
Description
data input
bus output
output enable (active LOW)
supply voltage
ground (0 V)
Rev. 02 — 10 January 2008
amb
I
O
O
< 0 V
> V
= 0 V to V
= 40 C to +85 C
CC
or V
CC
O
< 0 V
CC
= 0 V
Output
nY
L
H
Z
[1][2]
[1]
[2]
[3]
Quad buffer/line driver; 3-state
Min
-
-
-
-
0.5
50
0.5
0.5
0.5
0.5
100
65
74ALVC125
Max
+4.6
-
+4.6
V
+4.6
+4.6
100
-
+150
500
50
50
CC
© NXP B.V. 2008. All rights reserved.
+ 0.5
Unit
V
mA
V
mA
V
V
V
mA
mA
mA
mW
C
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