74LVC3G17DP,125 NXP Semiconductors, 74LVC3G17DP,125 Datasheet - Page 14

IC BUFF SCHMT TRG TRPL 8TSSOP

74LVC3G17DP,125

Manufacturer Part Number
74LVC3G17DP,125
Description
IC BUFF SCHMT TRG TRPL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC3G17DP,125

Logic Type
Schmitt Trigger - Buffer, Driver
Package / Case
8-TSSOP
Number Of Elements
3
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74LVC
Number Of Channels Per Chip
3
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
-40 C
Propagation Delay Time
5.4 ns
Number Of Lines (input / Output)
3 / 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC3G17DP-G
74LVC3G17DP-G
935275564125
NXP Semiconductors
Fig 16. Package outline SOT833-1 (XSON8)
74LVC3G17
Product data sheet
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
SOT833-1
VERSION
OUTLINE
max
A
terminal 1
index area
0.5
e
(1)
(2)
max
0.04
L
A
1
1
0.25
0.17
b
IEC
- - -
1
8
2.0
1.9
D
e
1
1.05
0.95
E
0
2
7
MO-252
JEDEC
0.6
All information provided in this document is subject to legal disclaimers.
e
e
D
REFERENCES
1
0.5
e
1
Rev. 7 — 4 November 2010
3
6
0.35
0.27
L
Triple non-inverting Schmitt trigger with 5 V tolerant input
JEITA
e
- - -
1
0.40
0.32
scale
L
1
1
b
4
5
A
L
1
E
A
(2)
2 mm
PROJECTION
EUROPEAN
74LVC3G17
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
07-11-14
07-12-07
SOT833-1
14 of 23

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