74LVC3G07DP,125 NXP Semiconductors, 74LVC3G07DP,125 Datasheet - Page 11

IC BUFFER TRPL OP/DRAIN 8TSSOP

74LVC3G07DP,125

Manufacturer Part Number
74LVC3G07DP,125
Description
IC BUFFER TRPL OP/DRAIN 8TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC3G07DP,125

Logic Type
Buffer/Line Driver, Non-Inverting with Open Drain
Number Of Elements
3
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Logic Family
LVC
Number Of Channels Per Chip
3
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Low Level Output Current
32 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
3 / 3
Output Type
Open Drain
Propagation Delay Time
3.7 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC3G07DP-G
74LVC3G07DP-G
935275558125
NXP Semiconductors
Fig 11. Package outline SOT765-1 (VSSOP8)
74LVC3G07
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
REFERENCES
D
2.1
1.9
M
(1)
Rev. 7 — 9 August 2010
E
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
H E
E
0.40
0.15
L p
Triple buffer with open-drain output
0.21
0.19
Q
5 mm
L
L p
PROJECTION
EUROPEAN
Q
0.2
v
A
(A 3 )
0.13
74LVC3G07
w
X
θ
v
M
0.1
y
© NXP B.V. 2010. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
θ
11 of 21

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