74AUP1T34GW,125 NXP Semiconductors, 74AUP1T34GW,125 Datasheet

IC BUFFER LOW PWR N-INV 5TSSOP

74AUP1T34GW,125

Manufacturer Part Number
74AUP1T34GW,125
Description
IC BUFFER LOW PWR N-INV 5TSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T34GW,125

Package / Case
SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
1.1 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
Number Of Channels Per Chip
1
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Input Bias Current (max)
0.5 uA
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Propagation Delay Time
32.9 ns @ 1.1 V to 1.3 V
Number Of Lines (input / Output)
1 / 1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP1T34GW-G
74AUP1T34GW-G
935280516125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP1T34GW,125
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. General description
2. Features and benefits
The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is
designed to track V
accepts any supply voltage from 1.1 V to 3.6 V. This feature allows universal low voltage
interfacing between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
static and dynamic power consumption across the entire V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
74AUP1T34
Low-power dual supply translating buffer
Rev. 2 — 19 August 2010
Wide supply voltage range from 1.1 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Wide supply voltage range:
Low static power consumption; I
Each port operates over the full 1.1 V to 3.6 V power supply range
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C
OFF
OFF
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
V
V
circuitry provides partial Power-down mode operation
CC(A)
CC(Y)
circuitry disables the output, preventing the damaging backflow current through
: 1.1 V to 3.6 V
: 1.1 V to 3.6 V
CC(A)
. Output Y is designed to track V
CC
range from 1.1 V to 3.6 V. This device ensures a very low
CC
= 0.9 μA (maximum)
CC
CC(Y)
CC
. Both, V
range from 1.1 V to 3.6 V.
Product data sheet
CC(A)
OFF
.
and V
CC(Y)

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74AUP1T34GW,125 Summary of contents

Page 1

Low-power dual supply translating buffer Rev. 2 — 19 August 2010 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track V accepts any supply voltage from 1.1 V ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74AUP1T34GW −40 °C to +125 °C 74AUP1T34GM −40 °C to +125 °C 74AUP1T34GF −40 °C to +125 °C 74AUP1T34GN −40 °C to +125 °C 74AUP1T34GS 4. Marking Table 2. Marking ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP1T34 CC(A) CC( GND Y 001aad741 Fig 4. Pin configuration SOT353-1 6.2 Pin description Table 3. Pin description Symbol Pin TSSOP5 V 1 CC( GND n. CC(Y) 7. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74AUP1T34 Product data sheet ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage A CC(A) V supply voltage Y CC(Y) I input clamping current IK V input voltage I I output clamping current OK V output voltage ...

Page 5

... NXP Semiconductors 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter V supply voltage A CC(A) V supply voltage Y CC(Y) V input voltage I V output voltage O T ambient temperature amb Δt/ΔV input transition rise and fall rate control and data inputs; 10. Static characteristics Table 7. ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I power-off A input; V OFF leakage current V CC(A) Y output 3 ΔI additional A input; V OFF power-off V CC(A) leakage current Y output 3 supply current port CC(A) V CC(A) V CC(A) port CC(A) ...

Page 7

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage = 20 μ 1.1 mA 1.7 mA 1.9 mA 2.3 mA 3.1 mA 2.7 mA 4.0 mA input leakage 3 current I power-off A input; V OFF leakage current V CC(A) Y output 3 ΔI additional A input; V ...

Page 8

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level output voltage = −20 μ −1.1 mA −1.7 mA −1.9 mA −2.3 mA −3.1 mA −2.7 mA −4.0 mA LOW-level output voltage = 20 μ 1.1 mA 1.7 mA 1.9 mA 2.3 mA 3.1 mA 2.7 mA 4.0 mA input leakage 3.6 V ...

Page 9

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see pF 3 3.6 V ...

Page 10

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see ...

Page 11

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see ...

Page 12

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see CC(A) t propagation delay see ...

Page 13

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions pF and power dissipation MHz capacitance [1] All typical values are measured at nominal V [ the same as t and PLH PHL [3] All specified values are the average typical values over all stated loads. ...

Page 14

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 10. ...

Page 15

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 9 ...

Page 16

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 17

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 11 ...

Page 18

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 19

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 20

... NXP Semiconductors 14. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 12. Revision history Document ID Release date 74AUP1T34 v.2 20100819 • Modifications: Added type number 74AUP1T34GN (SOT1115/XSON6 package). ...

Page 21

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 22

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP1T34 Product data sheet 16 ...

Page 23

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 Package outline ...

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