74AHC2G126DP,125 NXP Semiconductors, 74AHC2G126DP,125 Datasheet - Page 11

IC BUFF DVR TRI-ST DL 8TSSOP

74AHC2G126DP,125

Manufacturer Part Number
74AHC2G126DP,125
Description
IC BUFF DVR TRI-ST DL 8TSSOP
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheet

Specifications of 74AHC2G126DP,125

Package / Case
8-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AHC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Input Bias Current (max)
1 uA
Low Level Output Current
8 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Output Current
25 mA
Output Type
3-State
Propagation Delay Time
11.5 ns @ 3 V to 3.6 V or 7.5 ns @ 4.5 V to 5.5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC2G126DP-G
74AHC2G126DP-G
935274672125
NXP Semiconductors
Fig 10. Package outline SOT765-1 (VSSOP8)
74AHC_AHCT2G126
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
REFERENCES
D
2.1
1.9
M
(1)
Rev. 5 — 24 March 2011
E
74AHC2G126; 74AHCT2G126
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
H E
E
0.40
0.15
L p
0.21
0.19
Q
5 mm
L
Dual buffer/line driver; 3-state
L p
PROJECTION
EUROPEAN
Q
0.2
v
A
(A 3 )
0.13
w
X
θ
v
M
0.1
y
© NXP B.V. 2011. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
θ
11 of 16

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