74LVC07APW,112 NXP Semiconductors, 74LVC07APW,112 Datasheet - Page 12
74LVC07APW,112
Manufacturer Part Number
74LVC07APW,112
Description
IC BUFF HEX OPEN DRAIN 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC07ABQ115.pdf
(14 pages)
Specifications of 74LVC07APW,112
Logic Type
Buffer/Line Driver, Non-Inverting with Open Drain
Number Of Elements
6
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Logic Family
LVC
Number Of Channels Per Chip
6
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
6 / 6
Output Type
Open Drain
Propagation Delay Time
2.4 ns at 2.7 V, 2.2 ns at 3.3 V, 1.6 ns at 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC07APW
74LVC07APW
935265482112
74LVC07APW
935265482112
Philips Semiconductors
2003 Nov 11
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
Hex buffer with open-drain outputs
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT762-1
max.
A
1
(1)
terminal 1
index area
0.05
0.00
A 1
terminal 1
index area
E h
L
0.30
0.18
14
1
b
IEC
- - -
0.2
2
c
13
e
D
3.1
2.9
0
(1)
1.65
1.35
D h
D h
e 1
D
MO-241
JEDEC
E
2.6
2.4
(1)
b
REFERENCES
1.15
0.85
E h
9
6
0.5
e
7
8
JEITA
12
B
- - -
scale
e
w
2.5
v
e 1
2
M
M
A
E
C
C
0.5
0.3
A
L
B
0.1
v
0.05
y 1 C
w
A
A 1
0.05
y
PROJECTION
EUROPEAN
5 mm
0.1
y 1
detail X
Product specification
X
C
74LVC07A
y
ISSUE DATE
02-10-17
03-01-27
c
SOT762-1