74LCX125MTCX Fairchild Semiconductor, 74LCX125MTCX Datasheet - Page 6
![IC BUFFER QUAD LV N-INV 14TSSOP](/photos/7/8/70852/74lcx125mtcx_sml.jpg)
74LCX125MTCX
Manufacturer Part Number
74LCX125MTCX
Description
IC BUFFER QUAD LV N-INV 14TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Datasheet
1.74LCX125MX.pdf
(13 pages)
Specifications of 74LCX125MTCX
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Logic Family
74LCX
Number Of Channels Per Chip
Quad
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
10 uA
Low Level Output Current
24 mA
Maximum Power Dissipation
25 pF
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
6.5 ns @ 2.7 V or 6 ns @ 3.3 V
Logic Device Type
Buffer, Non Inverting
Supply Voltage Range
2V To 3.6V
Logic Case Style
TSSOP
No. Of Pins
14
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Number Of Lines (input / Output)
4 / 4
Family Type
LCX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LCX125MTCX
74LCX125MTCXTR
74LCX125MTCXTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LCX125MTCX
Manufacturer:
Fairchil
Quantity:
5 000
Company:
Part Number:
74LCX125MTCX
Manufacturer:
SAMSUNG
Quantity:
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Part Number:
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Manufacturer:
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©1995 Fairchild Semiconductor Corporation
74LCX125 Rev. 1.7.0
AC Loading and Waveforms
Waveform for Inverting and Non-Inverting Functions
Propagation Delay. Pulse Width and t
3-STATE Output Low Enable and
Disable Times for Logic
Figure 2. Waveforms (Input Characteristics; f = 1MHz, t
Figure 1. AC Test Circuit (C
Symbol
V
V
V
V
mo
mi
x
y
(Generic for LCX Family)
rec
Waveforms
3.3V ± 0.3V
V
V
OH
OL
1.5V
1.5V
+ 0.3V
– 0.3V
L
includes probe and jig capacitance)
6
V
V
Setup Time, Hold Time and Recovery Time for Logic
OL
OH
2.7V
V
1.5V
1.5V
+ 0.3V
– 0.3V
CC
3-STATE Output High Enable and
2.5V ± 0.2V
V
V
Disable Times for Logic
OH
OL
V
V
t
t
t
PLH
PZL
PZH
CC
CC
+ 0.15V
– 0.15V
Test
r
, t
/ 2
/ 2
, t
, t
t
= t
PLZ
rise
PHL
PHZ
f
= 3ns)
and t
Open
6V at V
V
GND
CC
fall
x 2 at V
CC
Switch
CC
3.3 ± 0.3V
www.fairchildsemi.com
2.5 ± 0.2V