74HCT640DB,112 NXP Semiconductors, 74HCT640DB,112 Datasheet - Page 16

IC TRANSCEIVER 3ST 8BIT 20SSOP

74HCT640DB,112

Manufacturer Part Number
74HCT640DB,112
Description
IC TRANSCEIVER 3ST 8BIT 20SSOP
Manufacturer
NXP Semiconductors
Series
74HCTr

Specifications of 74HCT640DB,112

Logic Type
Transceiver, Inverting
Package / Case
20-SSOP
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74HCT
Number Of Channels Per Chip
8
Input Level
TTL
Output Level
TTL
Output Type
3-State
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
9 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Function
Inverting
Input Bias Current (max)
8 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Inverting
Number Of Circuits
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2896-5
935190190112
Philips Semiconductors
HCMOS family characteristics
FAMILY SPECIFICATIONS
AC CHARACTERISTICS
The “AC CHARACTERISTICS” table lists the guaranteed
limits when a device is tested under the conditions given in
the AC Test Circuits and Waveforms section.
TEST CIRCUITS
Good high-frequency wiring practices should be used in
test circuits. Capacitor leads should be as short as
possible to minimize ripples on the output waveform
transitions and undershoot. Generous ground metal
(preferably a ground-plane) should be used for the same
reasons. A V
decoupling capacitor should be provided
CC
at the test socket, also with short leads. Input signals
should have rise and fall times of 6 ns, a signal swing of
0 V to V
for 74HC and 0 V to 3 V for 74HCT; a 1.0 MHz
CC
square wave is recommended for most propagation delay
tests. The repetition rate must be increased for testing
f
. Two pulse generators are usually required for testing
max
such parameters as set-up time, hold time and removal
time. f
is also tested with 6 ns input rise and fall times,
max
with a 50% duty factor, but for typical f
as high as
max
60 MHz, there are no constraints on rise and fall times.
March 1988
16

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