BTS 5682E Infineon Technologies, BTS 5682E Datasheet - Page 12

• Manufacturer Part Number: BTS 5682E
• Manufacturer: Infineon Technologies

Specifications of BTS 5682E

• Packages: PG-DSO-36
• Channels: 6.0
• Channel Mix: 3x50mohm+2*130mohm+1*230mohm
• Led Mode: Yes
• Cranking Mode: Yes
• Pwm Engine Integrated: No

5.2
The SPOC - BTS5682E is designed to support cranking capability at channel 5. It provides an extended operating
range specified by parameter
A latch operating at low
channel 5 switched on during supply voltage drop.
The latch mode of channel 5 is activated per default (HWCR.LCH = 1). This latch can be set via input pin or via SPI
register OUT.OUT5. The channel stays in ON-state until the latch is cleared.
For deactivating channel 5 latching operation mode the following steps needs to be performed:
•
•
The state of channel 5 can be read via HWCR.CH5. As a result, after cranking and micro-controller reset, the state
of the device (stand-by or channel 5 in ON-state) can be uniquely identified.
As long as channel 5 is in ON-state, the SPOC - BTS5682E will not enter stand-by mode.
5.3
There are several reset triggers implemented in the device. They reset the SPI registers and errors flags to their
default values. The power stages are not affected by the reset signals.
The first SPI transmission after any kind of reset contains at pin SO the read information from register OUT,
the transmission error bit TER is set.
Power-On Reset
The power-on reset is released, when
after wake up time
Reset Command
There is a reset command available to reset all register bits of the register bank and the diagnosis registers. As
soon as HWCR.RST = 1, a reset is triggered equivalent to power-on reset. The SPI interface can be accessed after
transfer delay time
Limp Home Mode
In Limp Home mode, the SPI write-registers are reset. Output OUTx will follow the input INx configuration only.
For application example see
as well as the error flags can be read, but any write command will be ignored. To activate the Limp Home mode,
LHI input pin voltage must be higher than
Data Sheet
The channel must not be activated via pin IN5 or OUT.OUT5.
The latch-bit must be cleared (HWCR.LCH = 0) via the SPI.
Cranking Mode
Reset
t
t
WU(PO)
CS(td)
.
.
V
BB
Figure
5.4.2
voltages was integrated into the gate control of channel 5 in order to keep the
independent of
23. The SPI interface is operating normally, so the limp home register bit LHI
V
DD
V
voltage level is higher than
LHI(H)
.
V
DD
12
supply.
V
DD(min)
. The SPI interface can be accessed
SPOC - BTS5682E
Rev. 1.0, 2008-01-22
Power Supply