TMP86xy08I/S/DMG/NG Toshiba, TMP86xy08I/S/DMG/NG Datasheet - Page 134

• Manufacturer Part Number: TMP86xy08I/S/DMG/NG
• Manufacturer: Toshiba

Specifications of TMP86xy08I/S/DMG/NG

• Package: SSOP30/SDIP30
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 4/8
• Ram Size: 256/256
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: 6
• Adc 10-bit Channels: -
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4.5 to 5.5

Table 12-1 Conversion Time according to ACK Setting and Frequency
AD Converter Control Register 2
AD Conversion Result Register
AD Conversion Result Register
ACK
ADCCR2
ADCDR1
ADCDR2
(000FH)
(0020H)
(0021H)
Note 1: Always set bit 0 in ADCCR2 to “0” and set bit 4 in ADCCR2 to “1”.
Note 2: When a read instruction for ADCCR2, bit 6 to 7 in ADCCR2 read in as undefined data.
Note 3: After STOP or SLOW/SLEEP mode are started, AD converter control register 2 (ADCCR2) is all initialized and no data
Note 1: Settings for “−” in the above table are inhibited.
Note 2: Set conversion time by Supply Voltage(VDD) as follows.
Note 1: The ADCDR2<EOCF> is cleared to “0” when reading the ADCDR1.
Note 2: ADCDR2<ADBF> is set to “1” when AD conversion starts and cleared to “0” when the AD conversion is finished. It
Note 3: If a read instruction is executed for ADCDR2, read data of bits 7, 6 and 3 to 0 are unstable.
000
001
010
011
100
101
110
Condition
111
-
-
IREFON
ACK
can be written in this register. Therefore, to use AD converter again, set the ADCCR2 newly after returning to NORMAL1
or NORMAL2 mode.
Therefore, the AD conversion result should be read to ADCDR2 more first than ADCDR1.
also is cleared upon entering STOP or SLOW mode.
AD07
VDD = 4.5 to 5.5 V
VDD = 2.7 to 5.5 V
EOCF
ADBF
7
7
7
Conbersion
1248/fc
156/fc
312/fc
624/fc
time‘
39/fc
78/fc
AD06
DA converter (ladder resistor)
connection control
AD conversion time select
6
6
6
AD conversion end flag
AD conversion busy flag
IREFON
19.5 µs
39.0 µs
78.0 µs
16MHz
EOCF
AD05
5
5
5
-
-
-
(15.6 µs or more)
(31.2 µs or more)
ADBF
AD04
“1”
4
4
4
156.0 µs
19.5 µs
39.0 µs
78.0 µs
8MHz
-
-
AD03
0: Before or during conversion
1: Conversion completed
0: During stop of AD conversion
1: During AD conversion
3
3
3
0:
1:
000:
001:
010:
011:
100:
101:
110:
111:
Page 123
156.0 µs
19.5 µs
39.0 µs
78.0 µs
4 MHz
AD02
ACK
Connected only during AD conversion
Always connected
39/fc
Reserved
78/fc
156/fc
312/fc
624/fc
1248/fc
Reserved
-
-
2
2
2
Reserved
Reserved
AD01
1
1
1
156.0 µs
19.5 µs
39.0 µs
78.0 µs
2 MHz
-
-
AD00
“0”
0
0
0
124.8 µs
15.6 µs
31.2 µs
62.4 µs
10MHz
(Initial value: **0* 000*)
(Initial value: 0000 0000)
(Initial value: **00 ****)
-
-
124.8 µs
15.6 µs
31.2 µs
62.4 µs
5 MHz
-
-
TMP86C808DMG
124.8 µs
2.5 MHz
15.6 µs
31.2 µs
62.4 µs
-
-
Read
R/W
R/W
only