TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 68

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

P8
(0018H)
3.5.6
Note:
Bit symbol
Read/Write
After reset
Port 8 (P80 to P83)
AD converter.
MX, MY pin for touch screen interface.
ADTRG
(for P83 only)
The input channel selection of AD Converter, the permission of ADTRG input are set by AD Converter mode
register ADMOD1.
The input channel selection of AD Converter, the permission of MX, MY input are set
by touch screen control register TSICR.
Port 8 is a 4-bit input port and can also be used as the analog input pins for the internal
P83 can also be used as ADTRG pin for the AD converter. P82, P83 can also be used as
7
Port 8 read
AD Read
6
Figure 3.5.12 Registers for Port 8
Conversion
Figure 3.5.11 Port 8
register
5
result
Port 8 Register
91C025-66
4
converter
AD
P83
3
Channel
selector
Data from external port.
P82
2
R
P81
TSICR0<MXEN, MYEN >
(for P82, P83 only)
TSICR0<TSI7 >
1
Port 8
P80 to P83
(AN0 to AN3)
P80
TMP91C025
0
2007-02-28