74HC125DTR2G ON Semiconductor, 74HC125DTR2G Datasheet - Page 2

• Manufacturer Part Number: 74HC125DTR2G
• Description: IC BUFF TRI-ST QD N-INV 14TSSOP
• Manufacturer: ON Semiconductor
• Series: 74HCr

Specifications of 74HC125DTR2G

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 4
• Number Of Bits Per Element: 1
• Current - Output High, Low: 7.8mA, 7.8mA
• Voltage - Supply: 2 V ~ 6 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Logic Family: HC
• Number Of Channels Per Chip: 4
• Polarity: Non-Inverting
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 7.8 mA
• Low Level Output Current: 7.8 mA
• Minimum Operating Temperature: - 55 C
• Number Of Lines (input / Output): 4 / 4
• Output Type: 3-State
• Propagation Delay Time: 90 ns at 2 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74HC125DTR2GOSTR

Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
MAXIMUM RATINGS
Symbol
V
V
T
I
I
V
P
T
I
out
CC
CC
out
stg
in
in
D
L
GND
OE1
OE2
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
Power Dissipation in Still Air
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
A1
Y1
A2
Y2
FUNCTION TABLE
PIN ASSIGNMENT
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
A
H
X
L
Inputs
1
2
3
4
5
6
7
OE
HC125
H
L
L
Output
14
13
12
10
11
Y
H
L
Z
9
8
Parameter
CC
V
OE4
A4
Y4
OE3
A3
Y3
CC
and GND Pins
(SOIC or TSSOP Package)
TSSOP Package†
SOIC Package†
http://onsemi.com
– 0.5 to V
– 0.5 to V
2
– 0.5 to + 7.0
– 65 to + 150
Value
±20
±35
±75
500
450
260
CC
CC
OE1
OE2
OE3
OE4
Active−Low Output Enables
+ 0.5
+ 0.5
A1
A2
A3
A4
LOGIC DIAGRAM
Unit
mW
mA
mA
mA
_C
_C
V
V
V
10
12
13
PIN 14 = V
PIN 7 = GND
2
1
5
4
9
HC125
CC
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
V
range GND v (V
tied to an appropriate logic voltage
level (e.g., either GND or V
Unused outputs must be left open.
out
This device contains protection
Unused inputs must always be
should be constrained to the
11
3
6
8
Y1
Y2
Y3
Y4
in
or V
out
) v V
in
CC
CC
and
).
.