74AUP2G07GW,125 NXP Semiconductors, 74AUP2G07GW,125 Datasheet - Page 8

• Manufacturer Part Number: 74AUP2G07GW,125
• Description: IC BUFF DL LOW PWR OP/DR SC88
• Manufacturer: NXP Semiconductors
• Series: 74AUPr

Specifications of 74AUP2G07GW,125

• Package / Case: SC-70-6, SC-88, SOT-363
• Logic Type: Buffer/Line Driver, Non-Inverting with Open Drain
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Current - Output High, Low: 4mA, 4mA
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: AUP
• Number Of Channels Per Chip: 2
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 0.8 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Output Type: Open Drain
• Propagation Delay Time: 15.6 ns @ 1.1 V to 1.3 V or 9.7 ns @ 1.65 V to 1.95 V or 9.4 ns @ 1.4 V to 1.6 V or 6.7 ns @ 2.3 V to 2.7 V
• Number Of Lines (input / Output): 2 / 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2577-2; 935279985125

NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
[4]
12. Waveforms
Table 9.
74AUP2G07
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 7.
CC
L
PD
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
All specified values are the average typical values over all stated loads.
C
P
f
V
N = number of inputs switching.
pd
i
D
CC
PD
= input frequency in MHz;
is the same as t
= C
is used to determine the dynamic power dissipation (P
= supply voltage in V;
power dissipation
capacitance
Measurement points are given in
Logic level: V
The data input (nA) to output (nY) propagation delays
PD
Dynamic characteristics
Measurement points
× V
CC
2
× f
PZL
i
OL
× N where:
and t
is the typical output voltage drops that occur with the output load.
PLZ
Conditions
f
i
.
= 1 MHz; V
nA input
nY output
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
Input
V
0.5 × V
0.5 × V
0.5 × V
…continued
M
GND
Table
V
V
CC
OL
V
All information provided in this document is subject to legal disclaimers.
I
I
CC
= GND to V
CC
CC
CC
9.
.
Rev. 5 — 9 September 2010
V
M
t
PLZ
CC
D
in μW).
V
[3][4]
X
Output
V
0.5 × V
0.5 × V
0.5 × V
Figure
M
Min
Low-power dual buffer with open-drain output
-
-
-
-
-
-
CC
CC
CC
8.
25 °C
Typ
0.5
0.6
0.6
0.7
0.9
1.2
V
t
M
[1]
PZL
Max
V
-
-
-
-
-
-
M
mna528
Min
-
-
-
-
-
-
−40 °C to +125 °C
V
V
V
V
74AUP2G07
X
OL
OL
OL
(85 °C)
Max
+ 0.1 V
+ 0.15 V
+ 0.3 V
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
-
-
-
-
-
-
8 of 18
Unit
pF
pF
pF
pF
pF
pF