74LVC2G17GV,125 NXP Semiconductors, 74LVC2G17GV,125 Datasheet - Page 6
![IC BUFF SCHMT TRG DL N-INV 6TSOP](/photos/1/38/13824/sc-74-6_sml.jpg)
74LVC2G17GV,125
Manufacturer Part Number
74LVC2G17GV,125
Description
IC BUFF SCHMT TRG DL N-INV 6TSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC2G17GW125.pdf
(19 pages)
Specifications of 74LVC2G17GV,125
Package / Case
SC-74-6
Logic Type
Schmitt Trigger - Buffer, Driver
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Propagation Delay Time
3.8 ns (Typ) @ 2.7 V or 3.6 ns (Typ) @ 3.3 V or 2.7 ns (Typ) @ 5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4618-2
74LVC2G17GV-G
74LVC2G17GV-G
935273319125
74LVC2G17GV-G
74LVC2G17GV-G
935273319125
NXP Semiconductors
12. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
13. Waveforms
74LVC2G17
Product data sheet
Symbol Parameter
t
C
pd
Fig 7.
PD
Typical values are measured at T
t
C
P
f
f
C
V
N = number of inputs switching;
∑(C
pd
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
propagation delay nA to nY; see
power dissipation
capacitance
Measurement points are given in
V
The input (nA) to output (nY) propagation delays and the output transition times
PD
OL
Dynamic characteristics
CC
× V
and V
2
× f
CC
o
2
) = sum of outputs.
OH
× f
PLH
i
are typical output voltage drop that occur with the output load.
× N + ∑(C
and t
PHL
Conditions
per buffer; V
V
L
I
.
V
V
V
V
V
= GND to V
× V
amb
CC
CC
CC
CC
CC
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 4.5 V to 5.5 V
nA input
nY output
= 25 °C and V
2
× f
Table
o
All information provided in this document is subject to legal disclaimers.
CC
) where:
GND
Figure 7
CC
V
V
9.
= 3.3 V;
OH
OL
V
I
CC
t
Rev. 5 — 6 August 2010
PLH
= 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
Dual non-inverting Schmitt trigger with 5 V tolerant input
D
V
in μW).
M
[2]
[3]
V
M
Min
1.5
1.0
1.0
1.0
1.0
Figure
-
−40 °C to +85 °C
8.
Typ
V
16.3
M
5.6
3.7
3.8
3.6
2.7
V
M
[1]
t
mnb072
PHL
Max
10.5
6.5
6.5
5.7
4.3
-
−40 °C to +125 °C Unit
74LVC2G17
Min
1.5
1.0
1.0
1.0
1.0
-
© NXP B.V. 2010. All rights reserved.
Max
13.1
8.5
8.5
7.1
5.4
-
ns
ns
ns
ns
ns
pF
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