MAX9257 Maxim, MAX9257 Datasheet - Page 38

• Manufacturer Part Number: MAX9257
• Description: The MAX9257 serializer pairs with the MAX9258 deserializer to form a complete digital video serial link
• Manufacturer: Maxim

Fully Programmable Serializer/Deserializer
with UART/I
performed with or without spread spectrum. If the PRBS
test is programmed to run continuously, the MAX9257
must be powered down to stop the test. When pro-
grammed for a finite number of repetitions, the control
channel is enabled after the PRBS test finishes and
serialization enable (SEREN) is reset to 0. To start nor-
mal operation, the ECU must disable PRBSEN and
enable SEREN.
Parity protection of video data is programmable for par-
allel-word widths of 16 bits or less. When programmed,
two parity bits are appended to each parallel word
latched into the MAX9257. In the MAX9258, a 16-bit
parity error counter logs parity errors. The ERROR out-
put on the MAX9258 goes low if parity errors exceed a
programmable threshold.
AC-coupling increases the input voltage of the LVDS
receiver to the voltage rating of the capacitor. Two
capacitors are sufficient for isolation, but four capaci-
tors—two at the serializer output and two at the deseri-
alizer input—provide protection if either end of the
cable is shorted to a high voltage. AC-coupling blocks
low-frequency ground shifts and common-mode noise.
See Figure 31 for calculating the capacitor values for
AC-coupling depending on the parallel clock frequency.
The plot shows minimum capacitor values for two- and
four-capacitor-per-link systems. To block the highest
common-mode frequency shift, choose the minimum
Figure 30. I
38
SCL
SDA
______________________________________________________________________________________
P
Selection of AC-Coupling Capacitors
2
C Timing Parameters
t
BUF
S
t
HD;STA
t
LOW
AC-Coupling Benefits
2
t
t
HD;DAT
C Control Channel
R
Video Data Parity
t
HIGH
t
F
t
SU;DAT
capacitor value shown in Figure 31. In general, 0.1µF
capacitors are sufficient.
Voltage droop and the digital sum variaton (DSV) of trans-
mitted symbols cause signal transitions to start from dif-
ferent voltage levels. Because the transition time is finite,
starting the signal transition from different voltage levels
causes timing jitter. The time constant for an AC-coupled
link needs to be chosen to reduce droop and jitter to an
acceptable level. The RC network for an AC-coupled link
consists of the LVDS receiver termination resistor (R
Figure 31. AC-Coupling Capacitor Values vs. Clock Frequency
from 18MHz to 42MHz
t
SU;STA
Optimally Choosing AC-Coupling Capacitors
60
40
20
0
S
360
AC-COUPLING CAPACITOR VALUE
TWO CAPACITORS PER LINK
420
t
HD;STA
vs. SERIAL-DATA RATE
480
SERIAL-DATA RATE (Mbps)
FOUR CAPACITORS PER LINK
540
600
660
720
780
t
SU;STO
840
P
TR
),