SAF7113H/V1,557 NXP Semiconductors, SAF7113H/V1,557 Datasheet - Page 37

• Manufacturer Part Number: SAF7113H/V1,557
• Description: IC VIDEO INPUT PROCESSOR 44-QFP
• Manufacturer: NXP Semiconductors
• Type: Video Processorr

Specifications of SAF7113H/V1,557

• Package / Case: 44-MQFP, 44-PQFP
• Applications: AGP Cards, PCMCIA, Video Phones
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1319; 935263595557; SAF7113HB

Philips Semiconductors
9397 750 14231
Product data sheet
9.2.1 Subaddress 00h (read only register)
9.2.2 Subaddress 01h
9.2.3 Subaddress 02h
Table 26:
Table 27:
The programming of the horizontal increment delay is used to match internal processing
delays to the delay of the ADC. Use recommended position only.
Table 28:
[1]
[2]
Function
Chip Version (CV)
Function
No update
Minimum delay
Recommended position
Maximum delay
Function
Mode 0: CVBS (automatic gain) from AI11 (pin 4)
Mode 1: CVBS (automatic gain) from AI12 (pin 7)
Mode 2: CVBS (automatic gain) from AI21 (pin 43)
Mode 3: CVBS (automatic gain) from AI22 (pin 1)
Mode 4: reserved
Mode 5: reserved
Mode 6
(gain adjustable via GAI28 to GAI20) from AI21 (pin 43)
Mode 7
(gain adjustable via GAI28 to GAI20) from AI22 (pin 1)
Mode 8
(gain adapted to Y gain) from AI21 (pin 43)
Mode 9
(gain adapted to Y gain) from AI22 (pin 1)
Modes 10 to 15: reserved
Mode select (see
To take full advantage of the YC-modes 6 to 9 the I
to logic 1 (full luminance bandwidth).
[2]
[2]
[2]
[2]
: Y (automatic gain) from AI11 (pin 4) + C
: Y (automatic gain) from AI12 (pin 7) + C
: Y (automatic gain) from AI11 (pin 4) + C
: Y (automatic gain) from AI12 (pin 7) + C
[1]
Chip version subaddress 00h (D7 to D4)
Horizontal increment delay subaddress 01h (D3 to D0)
Analog control 1 subaddress 02h (D3 to D0)
Figure 27
Rev. 03 — 9 May 2005
to
Figure
34).
Logic levels
ID07
CV3
IDEL3
1
1
1
0
2
C-bus bit BYPS (subaddress 09h, bit 7) should be set
ID06
CV2
IDEL2
1
1
0
0
Control bits D3 to D0
MODE3 MODE2 MODE1 MODE0
0
0
0
0
0
0
0
0
1
1
1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
9-bit video input processor
0
0
0
0
1
1
1
1
0
0
1
ID05
CV1
IDEL1
1
1
0
0
SAF7113H
0
0
1
1
0
0
1
1
0
0
1
ID04
CV0
IDEL0
1
0
0
0
0
1
0
1
0
1
0
1
0
1
1
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