MAX4885 Maxim, MAX4885 Datasheet - Page 9

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MAX4885

Manufacturer Part Number
MAX4885
Description
The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals
Manufacturer
Maxim
Datasheet

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The MAX4885 integrates high-bandwidth analog
switches and level-translating buffers to implement a
complete 1:2 or 2:1 multiplexer for VGA signals. The
device provides switching for RGB, HSYNC, VSYNC,
and DDC signals. A low-noise charge pump with inter-
nal capacitors provides a boosted gate-drive voltage to
improve performance of the RGB switches.
The device provides two modes of operation: 1:2 and
2:1. In 1:2 mode (M = 0), the HSYNC and VSYNC
inputs feature level-shifting buffers to support TTL out-
put logic levels from low-voltage graphics controllers.
These buffered switches may be driven from as little as
+2.0V up to +5.5V. In 2:1 mode (M=1), the output
buffers for the HSYNC and VSYNC signals are dis-
abled. In both modes, RGB signals are routed with the
same high-performance analog switches, and DDC sig-
nals are voltage clamped to a diode drop less than
V
patibility with DDC signals and low-voltage ASICs. In
keyboard/video/mouse (KVM) applications, V
mally set to +5V because low-voltage clamping is not
required, as specified by the VESA standard.
Drive EN logic high to shut down the MAX4885. In shut-
down mode, supply current is reduced to 5µA and all
switches are high impedance, providing high-signal
rejection. The RGB, HSYNC, VSYNC, and DDC switches
are ESD protected to ±8kV by the Human Body Model.
CL
. Voltage clamping provides protection and com-
PIN
EP
18
19
22
23
24
25
26
27
28
31
32
DDCB1
DDCA1
NAME
SEL
H2
H1
G1
V2
V1
B1
R1
EP
_______________________________________________________________________________________
M
Detailed Description
Horizontal Sync I/O
Vertical Sync I/O
Vertical Sync I/O
Horizontal Sync I/O
RGB Analog I/O
RGB Analog I/O
RGB Analog I/O
DDC I/O
DDC I/O
Mode Select. Drive M low for 1:2 multiplexer mode. Drive M high for 2:1 multiplexer mode. See Tables
1, 2, and 3.
Select. Logic input for switching RGB, HV, and DDC switches. See Tables 1, 2, and 3.
Exposed Pad. Connect exposed pad to ground.
Complete VGA 1:2 or 2:1 Multiplexer
CL
is nor-
The MAX4885 provides three SPDT high-bandwidth
switches to route standard VGA R, G, and B signals
(see Table 1). A boosted gate-drive voltage is generat-
ed by an internal charge pump to improve performance
of the RGB switches. The R, G, and B analog switches
are identical, and any of the three switches can be
used to route red, green, or blue video signals. The
RGB switches function with reduced performance with
the charge pump disabled.
A low-noise charge pump with internal capacitors pro-
vides a doubled voltage for driving the RGB analog
switches. Noise voltage from the charge pump is less
than 50µV
the signal level, making the charge pump suitable for
Table 1. RGB Truth Table
X = Don’t Care
EN
0
0
1
FUNCTION
P-P.
Pin Description (continued)
SEL
The noise level is more than 80dB below
0
1
X
R0 to R1
G0 to G1
B0 to B1
R0 to R2
G0 to G2
B0 to B2
R_, B_, and G_, High Impedance
FUNCTION
RGB Switches
Charge Pump
9

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