MAX4885 Maxim, MAX4885 Datasheet - Page 11

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MAX4885

Manufacturer Part Number
MAX4885
Description
The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals
Manufacturer
Maxim
Datasheet

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In 2:1 mode, HSYNC and VSYNC buffers are disabled,
allowing bidirectional signaling. The DDC multiplexer
provides level shifting by clamping signals to a diode
drop less than V
Connect V
DDC signals.
Bypass each V+ pin and V
larger ceramic capacitor as close to the device as pos-
sible.
Figure 5. Human Body ESD Test Model
VOLTAGE
SOURCE
HIGH-
DC
CHARGE-CURRENT-
LIMIT RESISTOR
CL
to V+ to disable voltage clamping for
1MΩ
R
CL
100pF
C
______________________________________________________________________________________
C s
(see the Typical Operating Circuit).
Power-Supply Decoupling
STORAGE
CAPACITOR
1500Ω
RESISTANCE
DISCHARGE
CL
Complete VGA 1:2 or 2:1 Multiplexer
R
D
to ground with a 0.1µF or
2:1 Multiplexer
DEVICE
UNDER
TEST
High-speed switches such as the MAX4885 require
proper PC board layout for optimum performance.
Ensure that impedance-controlled PC board traces for
high-speed signals are matched in length and as short
as possible. Connect the exposed pad to a solid
ground plane.
PROCESS: BiCMOS
CONNECT EXPOSED PAD TO GND
Figure 6. HBM Discharge Current Waveform
AMPERES
I
P
36.8%
100%
90%
10%
0
0
t
RL
CURRENT WAVEFORM
TIME
t
Chip Information
DL
I r
PC Board Layout
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
11

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