STHDLS101TQTR STMicroelectronics, STHDLS101TQTR Datasheet - Page 20

• Manufacturer Part Number: STHDLS101TQTR
• Description: IC HDMI LEVEL SHIFTER AC 48-QFN
• Manufacturer: STMicroelectronics
• Type: Level Shifterr

Specifications of STHDLS101TQTR

• Function: *
• Circuit: *
• On-state Resistance: *
• Voltage Supply Source: *
• Voltage - Supply, Single/dual (±): *
• Current - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Applications: Graphic Cards, VGA Interfaces
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8499-2

Application information
6
6.1
6.2
6.3
20/26
Application information
Power supply sequencing
Proper power-supply sequencing is advised for all CMOS devices. It is
recommended to always apply V
or control pins.
Supply bypassing
Bypass each of the V
device as possible, with the smaller-valued capacitor as close to the V
as possible.
Differential traces
The high-speed inputs and TMDS outputs are the most critical parts for the device. There
are several considerations to minimize discontinuities on these transmission lines between
the connectors and the device.
(a) Maintain 100 Ω differential transmission line impedance into and out of the device.
(b) Keep an uninterrupted ground plane below the high-speed I/Os.
(c) Keep the ground-path vias to the device as close as possible to allow the shortest return
current path.
(d) Layout of the TMDS differential outputs should be with the shortest stubs from the
connectors.
Output trace characteristics affect the performance of the STHDLS101T. Use controlled
impedance traces to match trace impedance to both the transmission medium impedance
and termination resistor. Run the differential traces close together to minimize the effects of
the noise. Reduce skew by matching the electrical length of the traces. Avoid discontinuities
in the differential trace layout. Avoid 90 degree turns and minimize the number of vias to
further prevent impedance discontinuities.
CC
pins with 0.1 µF and 1nF capacitors in parallel as close to the
CC
before applying any signals to the input/output
CC
pin of the device
STHDLS101T