71M6511 Maxim, 71M6511 Datasheet - Page 5

• Manufacturer Part Number: 71M6511
• Description: The 71M6511 and 71M6511H are highly integrated SoCs with an MPU core, RTC, flash, and LCD driver
• Manufacturer: Maxim

Tables
Page: 5 of 98
A Maxim Integrated Products Brand
Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles .............................................................................. 8
Table 2: Channel control based on MUX_DIV and FIR_LEN ........................................................................................ 9
Table 3: CE DRAM Locations for ADC Results ............................................................................................................. 12
Table 4: Standard Meter Equations (inputs shown gray are scanned but not used for calculation) .................................. 12
Table 5: Stretch Memory Cycle Width......................................................................................................................... 16
Table 6: Internal Data Memory Map ........................................................................................................................... 17
Table 7: Special Function Registers Locations............................................................................................................. 17
Table 8: Special Function Registers Reset Values ........................................................................................................ 18
Table 9: PSW Register Flags ...................................................................................................................................... 19
Table 10: PSW bit functions ...................................................................................................................................... 19
Table 11: Port Registers ............................................................................................................................................ 20
Table 12: Special Function Registers .......................................................................................................................... 21
Table 13: Baud Rate Generation ................................................................................................................................. 22
Table 14: UART Modes .............................................................................................................................................. 22
Table 15: The S0CON Register ................................................................................................................................... 22
Table 16: The S1CON register .................................................................................................................................... 23
Table 17: The S0CON Bit Functions ............................................................................................................................ 23
Table 18: The S1CON Bit Functions ............................................................................................................................ 24
Table 19: The TMOD Register .................................................................................................................................... 24
Table 20: TMOD Register Bit Description .................................................................................................................... 25
Table 21: Timers/Counters Mode Description ............................................................................................................. 25
Table 22: The TCON Register ..................................................................................................................................... 25
Table 23: The TCON Register Bit Functions ................................................................................................................. 26
Table 24: Timer Modes .............................................................................................................................................. 26
Table 25: The PCON Register ..................................................................................................................................... 26
Table 26: The IEN0 Register (see also Table 34) ......................................................................................................... 27
Table 27: The IEN0 Bit Functions (see also Table 34)................................................................................................... 27
Table 28: The IEN1 Register (see also Tables 35/36) ................................................................................................... 27
Table 29: The IEN1 Bit Functions (see also Tables 35/36) ............................................................................................ 27
Table 30: The IP0 Register (see also Table 46)............................................................................................................ 28
Table 31: The IP0 bit Functions (see also Table 46) ..................................................................................................... 28
Table 32: The WDTREL Register ................................................................................................................................ 28
Table 33: The WDTREL Bit Functions ......................................................................................................................... 28
Table 34: The IEN0 Register ...................................................................................................................................... 29
Table 35: The IEN0 Bit Functions ............................................................................................................................... 30
Table 36: The IEN1 Register ...................................................................................................................................... 31
Table 37: The IEN1 Bit Functions ............................................................................................................................... 31
Table 38: The IEN2 Register ...................................................................................................................................... 31
Table 39: The IEN2 Bit Functions ............................................................................................................................... 31
Table 40: The TCON Register ..................................................................................................................................... 32
Table 41: The TCON Bit Functions .............................................................................................................................. 32
Table 42: The IRCON Register.................................................................................................................................... 32
Table 43: The IRCON Bit Functions............................................................................................................................. 32
Table 44: External MPU Interrupts ............................................................................................................................. 33
Table 45: Control Bits for External Interrupts .............................................................................................................. 33
Table 46: Priority Level Groups .................................................................................................................................. 34
Table 47: The IP0 Register:........................................................................................................................................ 34
Table 48: The IP1 Register:........................................................................................................................................ 34
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Single-Phase Energy Meter IC
71M6511/71M6511H
DATA SHEET
NOVEMBER 2010
V2.7