71M6511 Maxim, 71M6511 Datasheet - Page 17

• Manufacturer Part Number: 71M6511
• Description: The 71M6511 and 71M6511H are highly integrated SoCs with an MPU core, RTC, flash, and LCD driver
• Manufacturer: Maxim

Internal Data Memory: The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data
memory address is always 1 byte wide and can be accessed by either direct or indirect addressing. The Special Function
Registers occupy the upper 128 bytes. This SFR area is available only by direct addressing. Indirect addressing
accesses the upper 128 bytes of Internal RAM.
The lower 128 bytes contain working registers and bit-addressable memory. The lower 32 bytes form four banks of eight
registers (R0-R7). Two bits on the program memory status word (PSW) select which bank is in use. The next 16 bytes form a
block of bit-addressable memory space at bit addressees 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible
through direct or indirect addressing. Table 6 shows the internal data memory map.
Address
Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 7.
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 651X are shown in bold print. Any
read access to unimplemented addresses will return undefined data, while any write access will have no effect. The registers
at 0x80, 0x88, 0x90, etc., are bit-addressable, all others are byte-addressable.
Page: 17 of 98
Hex\Bi
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
F8
F0
98
90
88
80
n
A Maxim Integrated Products Brand
address-
INTBITS
WDCON
S0CON
IRCON
TCON
X000
IEN1
able
WDI
IEN0
PSW
Bit-
P2
P1
P0
B
A
Direct addressing
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
S0BUF
TMOD
X001
DIR2
DIR1
IP1
IP0
SP
Special Function Registers
FLSHCTL
Table 7: Special Function Registers Locations
S0RELH
S0RELL
© 2005–2010 Teridian Semiconductor Corporation
X010
DIR0
IEN2
DPS
DPL
TL0
Table 6: Internal Data Memory Map
(SFRs)
Indirect addressing
S1RELH
S1CON
X011
DPH
TL1
Byte-addressable
Register banks R0…R7
Byte-addressable area
Bit-addressable area
ERASE
S1BUF
DPL1
X100
TH0
Single-Phase Energy Meter IC
S1RELL
DPH1
X101
TH1
71M6511/71M6511H
RAM
DATA SHEET
EEDATA
WDTREL
CKCON
X110
EECTRL
PGADR
PCON
X111
USR2
NOVEMBER 2010
Bin/He
DF
CF
BF
AF
FF
F7
EF
E7
D7
C7
B7
A7
9F
8F
97
87
x
V2.7