DS1254 Maxim, DS1254 Datasheet - Page 4

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DS1254

Manufacturer Part Number
DS1254
Description
The DS1254 is a fully nonvolatile static RAM (NV SRAM) (organized as 2M words by 8 bits) with built-in real-time clock
Manufacturer
Maxim
Datasheet

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data transfer to or from the timekeeping registers can proceed. The next 64 cycles will cause the phantom clock to
either receive or transmit data on DQ0, depending on the level of the OE pin or the WE pin. Cycles to other
locations outside the memory block can be interleaved with CE cycles without interrupting the pattern-recognition
sequence or data-transfer sequence to the phantom clock.
PHANTOM CLOCK REGISTER INFORMATION
The phantom clock information is contained in eight registers of 8 bits, each of which is sequentially accessed one
bit at a time after the 64-bit pattern-recognition sequence has been completed. When updating the phantom clock
registers, each register must be handled in groups of 8 bits. Writing and reading individual bits within a register
could produce erroneous results. These read/write registers are defined in Figure 3.
Figure 2. Phantom Clock Protocol Definition
NOTE: THE PATTERN RECOGNITION IN HEX IS C5, 3A, A3, 5C, C5, 3A, A3, 5C. THE ODDS OF THIS PATTERN BEING ACCIDENTALLY DUPLICATED AND
CAUSING INADVERTENT ENTRY TO THE PHANTOM CLOCK IS LESS THAN 1 IN 10
4 of 17
19
. THIS PATTERN IS SENT TO THE PHANTOM CLOCK LSB TO MSB.
DS1254

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