DS28E01-100 Maxim, DS28E01-100 Datasheet - Page 5

• Manufacturer Part Number: DS28E01-100
• Description: The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1)
• Manufacturer: Maxim

The DS28E01-100 combines 1024 bits of EEPROM
organized as four 256-bit pages, a 64-bit secret, a reg-
ister page, a 512-bit SHA-1 engine, and a 64-bit ROM
registration number in a single chip. Data is transferred
serially through the 1-Wire protocol, which requires only
a single data lead and a ground return. The DS28E01-
100 has an additional memory area called the scratch-
pad that acts as a buffer when writing to the memory,
the register page, or when installing a new secret. Data
is first written to the scratchpad from where it can be
read back. After the data has been verified, a Copy
Scratchpad command transfers the data to its final
memory location, provided that the DS28E01-100
receives a matching 160-bit MAC. The computation of
the MAC involves the secret and additional data stored
in the DS28E01-100 including the device’s registration
number. Only a new secret can be loaded without pro-
viding a MAC. The SHA-1 engine is also activated to
compute 160-bit MACs when performing an authenti-
cated read of a memory page and when computing a
new secret, instead of loading it. The DS28E01-100
understands a unique command “Refresh Scratchpad.”
Proper use of a refresh sequence after a Copy
Scratchpad operation reduces the number of weak bit
failures if the device is used in a touch environment
(see the Writing with Verification section). The refresh
sequence also provides a means to restore functionali-
ty in a device with bits in a weak state.
3, 4, 5, 6
TSOC
—
1
2
TDFN-EP
1, 4, 5, 6
—
3
2
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PIN
Detailed Description
ABRIDGED DATA SHEET
SFN
—
—
2
1
TO-92
—
1
3
2
1Kb Protected 1-Wire EEPROM
NAME
GND
N.C.
EP
IO
Ground Reference
1- Wi r e Bus Inter face. O p en- d r ai n si g nal that r eq ui r es an exter nal
p ul l up r esi stor .
Not Connected
Exposed Pad (TDFN Only). Solder evenly to the board’s ground
plane for proper operation. Refer to Application Note 3273:
Exposed Pads: A Brief Introduction for additional information.
The device’s 64-bit ROM registration number guaran-
tees unique identification and is used to address the
device in a multidrop 1-Wire network environment,
where multiple devices reside on a common 1-Wire bus
and operate independently of each other. Applications
of the DS28E01-100 include printer cartridge configura-
tion and monitoring, medical sensor authentication and
calibration, and system intellectual property protection.
The block diagram in Figure 1 shows the relationships
between the major control and memory sections of the
DS28E01-100. The DS28E01-100 has six main data
components: 64-bit lasered ROM, 64-bit scratchpad,
four 256-bit pages of EEPROM, register page, 64-bit
secrets memory, and a 512-bit SHA-1 engine. Figure 2
shows the hierarchic structure of the 1-Wire protocol.
The bus master must first provide one of the seven ROM
function commands: Read ROM, Match ROM, Search
ROM, Skip ROM, Resume Communication, Overdrive-
Skip ROM, or Overdrive-Match ROM. Upon completion
of an Overdrive-Skip ROM or Overdrive-Match ROM
command executed at standard speed, the device
enters overdrive mode where all subsequent communi-
cation occurs at a higher speed. The protocol required
for these ROM function commands is described in
Figure 10. After a ROM function command is success-
fully executed, the memory and SHA-1 functions
become accessible and the master can provide any
one of the 9 available function commands. The function
protocols are described in Figure 8. All data is read
and written least significant bit first.
with SHA-1 Engine
FUNCTION
Pin Description
Overview
5