DS28E01-100 Maxim, DS28E01-100 Datasheet - Page 19

• Manufacturer Part Number: DS28E01-100
• Description: The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1)
• Manufacturer: Maxim

In a 1-Wire environment, line termination is possible
only during transients controlled by the bus master
(1-Wire driver). 1-Wire networks, therefore, are suscep-
tible to noise of various origins. Depending on the phys-
ical size and topology of the network, reflections from
end points and branch points can add up or cancel
each other to some extent. Such reflections are visible
as glitches or ringing on the 1-Wire communication line.
Noise coupled onto the 1-Wire line from external
sources can also result in signal glitching. A glitch dur-
ing the rising edge of a time slot can cause a slave
device to lose synchronization with the master and,
consequently, result in a Search ROM command com-
ing to a dead end or cause a device-specific function
command to abort. For better performance in network
applications, the DS28E01-100 uses a new 1-Wire front-
end, which makes it less sensitive to noise.
The DS28E01-100’s 1-Wire front-end differs from tradi-
tional slave devices in three characteristics.
1) There is additional lowpass filtering in the circuit that
2) There is a hysteresis at the low-to-high switching
3) There is a time window specified by the rising edge
Figure 13. Noise Suppression Scheme
detects the falling edge at the beginning of a time
slot. This reduces the sensitivity to high-frequency
noise. This additional filtering does not apply at over-
drive speed.
threshold V
does not go below V
(Figure 13, Case A). The hysteresis is effective at
any 1-Wire speed.
hold-off time t
even if they extend below the V
V
PUP
V
TH
0V
Improved Network Behavior
V
TH
HY
(Switchpoint Hysteresis)
REH
. If a negative glitch crosses V
______________________________________________________________________________________
during which glitches are ignored,
TH
ABRIDGED DATA SHEET
CASE A
- V
HY
, it is not recognized
TH
- V
1Kb Protected 1-Wire EEPROM
HY
threshold
TH
t
t
REH
GL
but
CASE B
Devices that have the parameters V
fied in their electrical characteristics use the improved
1-Wire front-end.
The DS28E01-100 uses two different types of CRCs.
One CRC is an 8-bit type that is computed at the factory
and is stored in the most significant byte of the 64-bit
registration number. The bus master can compute a
CRC value from the first 56 bits of the 64-bit registration
number and compare it to the value read from the
DS28E01-100 to determine if the registration number
has been received error-free. The equivalent polynomial
function of this CRC is X
is received in the true (noninverted) form.
The other CRC is a 16-bit type, which is used for error
detection with memory and SHA-1 commands. For
details, refer to the full data sheet.
(Figure 13, Case B, t
or glitches that appear late after crossing the V
threshold and extend beyond the t
not be filtered out and are taken as the beginning of a
new time slot (Figure 13, Case C, t
with SHA-1 Engine
t
REH
t
GL
GL
8
+ X
< t
REH
CRC Generation
5
CASE C
+ X
). Deep voltage droops
4
HY
+ 1. This 8-bit CRC
GL
REH
and t
≥ t
REH
window can-
REH
).
speci-
31
TH