DS2432 Maxim, DS2432 Datasheet - Page 5

• Manufacturer Part Number: DS2432
• Description: The DS2432 combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to five user read/write bytes, a 512-bit SHA-1 engine, and a fully-featured 1-Wire interface in a single chip
• Manufacturer: Maxim

ABRIDGED DATA SHEET
1-Wire CRC GENERATOR Figure 4
MEMORY MAP
The DS2432 has four memory areas: data memory, secrets memory, register page with special function
registers and user-bytes, and a scratchpad. The data memory is organized in pages of 32 bytes. Secret,
register page and scratchpad are 8 bytes each. The scratchpad acts as a buffer when writing to the data
memory, loading the initial secret or when writing to the register page. For further details (including
Figure 5) refer to the full version of the data sheet.
ADDRESS REGISTERS AND TRANSFER STATUS
The DS2432 employs three address registers: TA1, TA2 and E/S (Figure 6). These registers are common
to many other 1-Wire devices but operate slightly differently with the DS2432. Registers TA1 and TA2
must be loaded with the target address to which the data will be written or from which data will be read.
Register E/S is a read-only transfer-status register, used to verify data integrity with write commands.
Since the scratchpad of the DS2432 is designed to accept data in blocks of eight bytes only, the lower
three bits of TA1 will be forced to 0 and the lower three bits of the E/S register (Ending Offset) will
always read 1. This indicates that all the data in the scratchpad will be used for a subsequent copying into
main memory or secret. Bit 5 of the E/S register, called PF or “partial byte flag”, is a logic-1 if the
number of data bits sent by the master is not an integer multiple of 8 or if the data in the scratchpad is not
valid due to a loss of power. A valid write to the scratchpad will clear the PF bit. Bits 3, 4 and 6 have no
function; they always read 1. The Partial Flag supports the master checking the data integrity after a
Write command. The highest valued bit of the E/S register, called AA or Authorization Accepted, acts as
a flag to indicate that the data stored in the scratchpad has already been copied to the target memory
address. Writing data to the scratchpad clears this flag.
ADDRESS REGISTERS Figure 6
X
0
STAGE
1
Target Address (TA1)
Target Address (TA2)
st
Ending Address with
Data Status (E/S)
X
1
STAGE
2
(Read Only)
nd
X
2
STAGE
Bit #
3
rd
X
T15
AA
3
T7
7
STAGE
4
th
Polynomial = X
T14
T6
6
1
T13
PF
T5
5
5 of 17
X
8
4
+ X
STAGE
T12
T4
5
4
1
5
th
+ X
4
+ 1
T11
T3
3
1
T10
T2
(0)
E2
(1)
2
X
5
STAGE
6
th
T1
(0)
T9
E1
(1)
1
INPUT DATA
X
6
STAGE
7
T0
(0)
T8
E0
(1)
0
th
X
7
STAGE
8
th
X
DS2432
8