DS2432 Maxim, DS2432 Datasheet - Page 12

• Manufacturer Part Number: DS2432
• Description: The DS2432 combines 1024 bits of EEPROM, a 64-bit secret, an 8-byte register/control page with up to five user read/write bytes, a 512-bit SHA-1 engine, and a fully-featured 1-Wire interface in a single chip
• Manufacturer: Maxim

ABRIDGED DATA SHEET
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 10
Read/Write Time Slots
The definitions of write and read time slots are illustrated in Figure 11. The master initiates all time slots
by driving the data line low. The falling edge of the data line synchronizes the DS2432 to the master by
triggering an internal delay circuit. During write time slots, the delay circuit determines when the DS2432
will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit
determines how long the DS2432 will hold the data line low. If the data bit is a “1”, the DS2432 will not
hold the data line low at all.
READ/WRITE TIMING DIAGRAM Figure 11
Write-one Time Slot
Write-zero Time Slot
V
V
V
PULLUP MIN
PULLUP MIN
PULLUP MIN
V
V
V
V
V
V
V
V
V
PULLUP
PULLUP
PULLUP
IL MAX
IL MAX
IL MAX
IH MIN
IH MIN
IH MIN
0V
0V
0V
MASTER TX “RESET PULSE” MASTER RX “PRESENCE PULSE”
RESISTOR
t
(OD: 2 µs)
(OD: 2 µs)
LOW1
15 µs
15 µs
t
RSTL
t
LOW0
Sampling Window
Sampling Window
12 of 17
t
t
SLOT
DS2432
SLOT
DS2432
(OD: 6 µs)
(OD: 6 µs)
MASTER
60 µs
60 µs
t
R
t
PDH
t
PDL
t
RSTH
RESISTOR
MASTER
DS2432
t
t
REC
REC
RESISTOR
MASTER
DS2432