STM6513 STMicroelectronics, STM6513 Datasheet - Page 5

• Manufacturer Part Number: STM6513
• Description: Smart reset
• Manufacturer: STMicroelectronics

Specifications of STM6513

• Dual Smart Reset Push-button Inputs With User-selectable Extended Reset Setup Delay (by Three-state Input Logic): tSRC= 2, 6, 10 s (min.)
• Operating Temperature: industrial grade –40 °C to +85 °C
• Tdfn8 Package: 2 mm x 2 mm x 0.75 mm

STM6513
1
Description
The STM6513 has two separate delayed Smart Reset inputs (SR0, SR1) which when taken
low simultaneously provide three user-selectable delayed Smart Reset setup time (t
options of 2 s, 6 s and 10 s. These are selected through a three-state TSR input pin: when
connected to ground, t
t
simultaneously after both the Smart Reset inputs were held active for the selected t
delay time. The first reset output, RST1, is active-high, push-pull; the second reset output,
RST2, is active-low, open-drain requiring an external pull-up resistor. The duration of the
output reset pulses is independently programmable: t
external capacitor C
360 ms typ. Additionally, the V
threshold, both the reset outputs go active and remain so while V
threshold, plus the defined duration of the reset pulse t
Smart Reset devices
The Smart Reset device family STM65xx provides a useful feature that ensures inadvertent
short reset push-button closures do not cause system resets. This is done by implementing
extended Smart Reset input delay (t
delay are met, the device generates an output reset pulse with user-programmable timeout
period (t
The Smart Reset inputs can be also connected to the applications interrupt to allow the
control of both the interrupt pin and the hard reset functions. If the push-buttons are closed
for a short time, the processor is only interrupted. If the system still does not respond
properly, holding the push-buttons for the extended setup time (t
the processor through the reset outputs. The Smart Reset feature helps significantly
increase system stability.
The STM65xx family of Smart Reset devices consists of low current microprocessor reset
circuits targeted at applications such as MP3 players, navigation, smartphones or mobile
phones; generally any application that requires delayed reset push-button(s) response for
improved system stability. The STM65xx devices feature single or dual Smart Reset inputs
(SR). The delayed Smart Reset setup time (t
(all min.) are adjustable by an external capacitor on the SRC pin or selectable by three-state
logic. The delayed setup period ignores switch closures shorter than t
unwanted resets.
The STM65xx devices have active-low (optionally active-high) open-drain reset (RST)
output(s) with or without internal pull-up resistor or push-pull as output options, with factory-
programmed or capacitor-adjustable or push-buttons defined output reset pulse duration,
with or without power-on reset function.
Some devices also have an undervoltage monitoring feature: the reset output is also
asserted when the monitored supply voltage V
reset output remains asserted for the reset timeout period (t
voltage goes above the specified threshold.
SRC
= 10 s (all the times are minimum). There are two reset outputs, both going active
REC
).
tREC
SRC
), t
= 2 s; when left open, t
REC2
CC
Doc ID 16490 Rev 2
is factory-programmed to 210 ms (typ.), with the option of
is monitored and if it drops below the selected V
SRC
). Once the valid Smart Reset input levels and setup
SRC
CC
) options of 2 s, 6 s and 10 s
drops below the specified threshold. The
SRC
REC1
= 6 s; when connected to V
REC
is user-programmable (by
on each output.
REC
) after the monitored supply
SRC
CC
) causes hard reset of
is below the V
SRC
, thus preventing
Description
RST
CC
RST
SRC
SRC
,
)
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