LNBH25 STMicroelectronics, LNBH25 Datasheet - Page 5

• Manufacturer Part Number: LNBH25
• Description: LNB supply and control IC with step-up and I2C interface
• Manufacturer: STMicroelectronics

LNBH25
2
2.1
2.2
Application information
This IC has a built-in DC-DC step-up converter that, from a single source (8 V to 16 V),
generates the voltages (V
/18 V LNB output voltages plus the 22 kHz DiSEqC™ tone) to work with a minimum
dissipated power of 0.5 W typ. @ 500 mA load (the LDO drop voltage is internally kept at
V
tone output is disabled by setting the LPM bit to “1” (see
IC is also provided with an undervoltage lockout circuit that disables the whole circuit when
the supplied V
function reduces the inrush current during start-up. The SS time is internally fixed at 4 ms
typ. to switch from 0 to 13 V and 6 ms typ. switch from 0 to 18 V.
DiSEqC data encoding (DSQIN pin)
The internal 22 kHz tone generator is factory trimmed in accordance to DiSEqC standards,
and can be activated in 3 different ways:
1.
2.
3.
Each of the above solutions requires that during the 22 kHz tone activation and/or DiSEqC
data transmission, the LPM bit must be set to “0” (see
Data encoding by external 22 kHz tone TTL signal
In order to improve design flexibility an external tone signal can be input to the DSQIN pin by
setting the EXTM bit to “1”.
The DSQIN is a logic input pin which activates the 22 kHz tone to the V
LNBH25 integrated tone generator.
The output tone waveforms are internally controlled by the LNBH25 tone generator in terms
of rise/fall time and tone amplitude, while, the external 22 kHz signal on the DSQIN pin is
used to define the frequency and the duty cycle of the output tone. A TTL compatible 22 kHz
signal is required for the proper control of the DSQIN pin function. Before sending the TTL
signal on the DSQIN pin, the EXTM and TEN bits must be previously set to “1”. As soon as
the DSQIN internal circuit detects the 22 kHz TTL external signal code, the LNBH25
activates the 22 kHz tone on the V
activation, and it stops with about 60 µs delay after the 22 kHz TTL signal on DSQIN has
expired (refer to
up
-V
by an external 22 kHz source DiSEqC data connected to the DSQIN logic pin (TTL
compatible). In this case the I²C Tone control bits must be set: EXTM = TEN = 1.
by an external DiSEqC data envelope source connected to the DSQIN logic pin. In this
case the I²C Tone control bits must be set: EXTM = 0 and TEN = 1.
through the TEN I²C bit if a 22 kHz presence is requested in continuous mode. In this
case the DSQIN TTL pin must be pulled HIGH and EXTM bit set to “0”.
OUT
= 1 V typ.). The LDO power dissipation can be further reduced when the 22 kHz
CC
Figure 2
drops below a fixed threshold (4.7 V typ.). The step-up converter soft-start
).
up
) that let the integrated LDO post-regulator (generating the 13 V
Doc ID 022433 Rev 4
OUT
output with about 1 µs delay from TTL signal
2.4: LPM (low power mode)
2.4: LPM (low power mode)
Application information
OUT
pin, by using the
).
). The
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