LNBH24 STMicroelectronics, LNBH24 Datasheet - Page 16

• Manufacturer Part Number: LNBH24
• Description: Dual LNB supply and control IC with step-up and I2C interface
• Manufacturer: STMicroelectronics

7
7.1
7.2
7.3
16/30
S
Mode
Write
Read
MSB
0
0
LNBH24 software description
The LNBH24 I²C interface controls both the IC sections A and B depending on the address
sent before the DATA byte. The description below is valid for both sections.
Interface protocol
The interface protocol comprises:
●
●
●
●
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, two addresses for each section selectable by ADDR-A/B pins (see
System register (SR, 1 Byte for each section A and B)
Write = control bits functions in write mode
Read = diagnostic bits in read mode.
All bits reset to 0 at power on
Transmitted data (I²C bus write mode) for each section A/B
When the R/W bit in the section address is set to 0, the main MCU can write on the system
register (SR) of the relative section (A or B, depending on the 7 bit address value) via I²C
BUS. All and 8 bits are available and can be written by the MCU to control the device
functions as per the below
Section address (A or B)
IMON
MSB
PCL
0
A start condition (S)
A chip address byte (the LSB bit determines read (=1)/write (=0) transmission)
A sequence of data (1 byte + acknowledge)
A stop condition (P)
1
VMON
TTX
0
X
X
TMON
TEN
Table
LSB
R/W ACK
6.
LLC
LLC
MSB
VSEL
VSEL
Data
EN
EN
ITEST
OTF
Table
LSB
10)
ACK
LSB
AUX
OLF
P