L6599A STMicroelectronics, L6599A Datasheet - Page 20

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L6599A

Manufacturer Part Number
L6599A
Description
IMPROVED HIGH-VOLTAGE RESONANT CONTROLLER
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6599A

Two-level Ocp
frequency-shift and latched shutdown

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Application information
7.2
20/36
Figure 23. Oscillator waveforms and their relationship with gate-driving signals
In
signal, as well as the swinging node of the half-bridge leg (HB) is shown. Note that the low-
side gate-drive is turned on while the oscillator's triangle is ramping up and the high-side
gate-drive is turned on while the triangle is ramping down. In this way, at start-up, or as the
IC resumes switching during burst-mode operation, the low-side MOSFET will be switched
on first to charge the bootstrap capacitor. As a result, the bootstrap capacitor will always be
charged and ready to supply the high-side floating driver.
Operation at no load or very light load
When the resonant half-bridge is lightly loaded or unloaded at all, its switching frequency will
be at its maximum value. To keep the output voltage under control in these conditions and to
avoid losing soft-switching, there must be some significant residual current flowing through
the transformer's magnetizing inductance. This current, however, produces some
associated losses that prevent converter's no-load consumption from achieving very low
values.
To overcome this issue, the L6599A enables the designer to make the converter operate
intermittently (burst-mode operation), with a series of a few switching cycles spaced out by
long idle periods where both MOSFETs are in OFF-state, so that the average switching
frequency can be substantially reduced. As a result, the average value of the residual
magnetizing current and the associated losses will be considerably cut down, thus
facilitating the converter to comply with energy saving recommendations.
The L6599A can be operated in burst-mode by using pin 5 (STBY): if the voltage applied to
this pin falls below 1.24 V the IC will enter an idle state where both gate-drive outputs are
low, the oscillator is stopped, the soft-start capacitor CSS keeps its charge and only the 2 V
reference at RFmin pin stays alive to minimize IC's consumption and Vcc capacitor's
discharge. The IC will resume normal operation as the voltage on the pin exceeds 1.24 V by
50 mV.
To implement burst-mode operation the voltage applied to the STBY pin needs to be related
to the feedback loop.
input voltage range (e.g. when there is a PFC front-end).
Figure 23
the timing relationship between the oscillator waveform and the gate-drive
Figure 24
Doc ID 15308 Rev 5
a shows the simplest implementation, suitable with a narrow
L6599A

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