ST72334N4 STMicroelectronics, ST72334N4 Datasheet - Page 135

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ST72334N4

Manufacturer Part Number
ST72334N4
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72334N4

Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
16.11 COMMUNICATION INTERFACE CHARACTERISTICS
16.11.1 SPI - Serial Peripheral Interface
Subject to general operating conditions for V
f
Figure 95. SPI Slave Timing Diagram with CPHA=0
Notes:
1. Data based on design simulation and/or characterisation results, not tested in production.
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends on the I/O port configuration.
3. Measurement points are done at CMOS levels: 0.3xV
OSC
1/t
Symbol
t
t
w(SCKH)
w(SCKL)
t
t
t
t
t
t
dis(SO)
t
t
t
t
t
t
r(SCK)
f(SCK)
su(SS)
t
su(MI)
t
v(MO)
h(MO)
f
su(SI)
a(SO)
h(SO)
MISO
MOSI
h(SS)
v(SO)
h(MI)
, and T
SCK
c(SCK)
h(SI)
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
INPUT
A
SPI clock frequency
SPI clock rise and fall time
SS setup time
SS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
unless otherwise specified.
see note 2
t
a(SO)
t
su(SS)
t
su(SI)
Parameter
MSB IN
t
t
w(SCKH)
w(SCKL)
MSB OUT
t
t
h(SI)
c(SCK)
t
DD
v(SO)
DD
,
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Slave (after enable edge)
Master (before capture edge)
Slave
BIT6 OUT
and 0.7xV
Refer to I/O port characteristics for more details on
the input/output alternate function characteristics
(SS, SCK, MOSI, MISO).
3)
Conditions
DD
ST72334J/N, ST72314J/N, ST72124J
BIT1 IN
.
t
h(SO)
f
f
CPU
CPU
=8MHz
=8MHz
t
t
r(SCK)
f(SCK)
f
CPU
LSB IN
0.0625
see I/O port pin description
0.25
0.25
Min
120
120
100
100
100
100
100
90
LSB OUT
0
0
0
/128
t
h(SS)
f
f
CPU
CPU
Max
120
240
120
2
4
/4
/2
t
dis(SO)
135/153
Unit
t
MHz
CPU
ns
note 2
see

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