ST72324BK4-Auto STMicroelectronics, ST72324BK4-Auto Datasheet - Page 86
ST72324BK4-Auto
Manufacturer Part Number
ST72324BK4-Auto
Description
8-bit MCU for automotive, 3.8 to 5.5V operating range with 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet
1.ST72324BJ2-AUTO.pdf
(198 pages)
Specifications of ST72324BK4-Auto
Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and external clock input
4 Power Saving Modes
Slow, Wait, Active Halt, and Halt
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Figure 46. Pulse width modulation mode timing example with two output compare
1. OC1R = 2ED0h, OC2R = 34E2, OLVL1 = 0, OLVL2 = 1
2. On timers with only one Output Compare register, a fixed frequency PWM signal can be generated using
Pulse Width Modulation mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so this functionality can not be used when PWM mode is activated.
In PWM mode, double buffering is implemented on the output compare registers. Any new
values written in the OC1R and OC2R registers are taken into account only at the end of the
PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).
Procedure
To use Pulse Width Modulation mode:
1.
2.
3.
4.
the output compare and the counter overflow to define the pulse length.
Load the OC2R register with the value corresponding to the period of the signal using
the formula below.
Load the OC1R register with the value corresponding to the period of the pulse if
(OLVL1 = 0 and OLVL2 = 1) using the formula in the opposite column.
Select the following in the CR1 register:
–
–
Select the following in the CR2 register:
–
–
–
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a
successful comparison with the OC2R register.
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0]) (see
functions
Counter 34E2
OCMP1
compare2
(1)(2)
FFFC FFFD FFFE
Doc ID13466 Rev 4
OLVL2
Table
compare1
2ED0 2ED1 2ED2
50).
OLVL1
compare2
34E2
OLVL2
FFFC
ST72324B-Auto
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