ST72321AR9-Auto STMicroelectronics, ST72321AR9-Auto Datasheet - Page 111

• Manufacturer Part Number: ST72321AR9-Auto
• Description: 8-bit MCU for automotive with 60 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
• Manufacturer: STMicroelectronics

Specifications of ST72321AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt, Wait and Slow

ST72321xx-Auto
Note:
1
2
3
4
5
Figure 54. Pulse width modulation cycle flowchart
If OLVL1 = 1 and OLVL2 = 0 the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1 = OLVL2 a continuous signal will be seen on the OCMP1 pin.
The OC
the following formula:
Where:
If the timer clock is an external clock the formula is:
Where:
The Output Compare 2 event causes the counter to be initialized to FFFCh (see
After a write instruction to the OCiHR register, the output compare function is inhibited until
the OCiLR register is also written.
The OCF1 and OCF2 bits cannot be set by hardware in PWM mode therefore the Output
Compare interrupt is inhibited.
The ICF1 bit is set by hardware when the counter reaches the OC2R value and can produce
a timer interrupt if the ICIE bit is set and the I bit is cleared.
In PWM mode the ICAP1 pin cannot be used to perform input capture because it is
disconnected to the timer. The ICAP2 pin can be used to perform input capture (ICF2 can be
set and IC2R can be loaded) but the user must take care that the counter is reset each
period and ICF1 can also generates interrupt if ICIE is set.
When the Pulse Width Modulation (PWM) and One Pulse Mode (OPM) bits are both set, the
PWM mode is the only active one.
t
f
PRESC = Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits; see
Timer clock
t
f
CPU
EXT
i
R register value required for a specific timing application can be calculated using
= Signal or pulse period (in seconds)
= CPU clock frequency (in hertz)
= Signal or pulse period (in seconds)
= External timer clock frequency (in hertz)
selection)
Counter
= OC1R
Counter
= OC2R
When
Doc ID 13829 Rev 1
When
OCiR value =
OCiR = t
OCMP1 = OLVL2
OCMP1 = OLVL1
Counter is reset
ICF1 bit is set
*
t
f
to FFFCh
EXT
*
f
PRESC
CPU
-5
- 5
Table 61:
16-bit timer
Figure
111/243
53).