ST72124J2 STMicroelectronics, ST72124J2 Datasheet - Page 112

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ST72124J2

Manufacturer Part Number
ST72124J2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72124J2

Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
ST72334J/N, ST72314J/N, ST72124J
FUNCTIONAL OPERATING CONDITIONS (Cont’d)
Figure 60. High LVD Threshold Versus V
Figure 61. Medium LVD Threshold Versus V
Figure 62. Low LVD Threshold Versus V
Notes:
1. LVD typical data are based on T
2. The minimum V
3. If the low LVD threshold is selected, when V
anteed to continue functioning until it goes into reset state. The specified V
on phase, but during a power down phase or voltage drop the device will function below this min. level.
112/153
DEVICE UNDER
DEVICE UNDER
DEVICE UNDER
IN THIS AREA
IN THIS AREA
IN THIS AREA
RESET
RESET
RESET
DD
f
f
f
OSC
OSC
OSC
rise time rate is needed to insure a correct device power-on and LVD reset. Not tested in production.
16
16
16
8
0
8
0
8
0
[MHz]
[MHz]
[MHz]
2.5
2.5
2.5
V
IT-
A
=25°C. They are given only as design guidelines and are not tested.
3
3
3.00V
V
IT-
DD
3.5
3.5
3.5V
DD
falls below 3.2V, (V
DD
V
IT-
and f
and f
DD
3.85
and f
OSC
OSC
4
4
4
OSC
for ROM devices
for ROM devices
for ROM devices
DD
4.5
4.5
4.5
minimum operating voltage), the device is guar-
DD
min. value is necessary in the device power
5
5
5
2)3)
2)
2)
5.5
5.5
5.5
SUPPLY VOLTAGE [V]
SUPPLY VOLTAGE [V]
SUPPLY VOLTAGE [V]
FUNCTIONAL AREA
FUNCTIONAL AREA
FUNCTIONAL AREA
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA

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